ISL6263CRZ Intersil, ISL6263CRZ Datasheet - Page 14

• Manufacturer Part Number: ISL6263CRZ
• Description: IC VREG CORE 5BIT 1PHASE 32-QFN
• Manufacturer: Intersil

Specifications of ISL6263CRZ

• Applications: Converter, Intel IMVP-6
• Voltage - Input: 5 ~ 25 V
• Number Of Outputs: 1
• Voltage - Output: 0.41 ~ 1.29 V
• Operating Temperature: -10°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

RBIAS Current Reference
The RBIAS pin is internally connected to a 1.545V reference
through a 3kΩ resistance. A bias current is established by
connecting a ±1% tolerance, 150kΩ resistor between the
RBIAS and VSS pins. This bias current is mirrored, creating the
OCSET reference current I
OCSET pin. Do not connect any other components to this
pin, as they will have a negative impact on the performance
of the IC.
I2UA Current Reference
The I2UA pin is connected to a 2µA current source I
current source is made available for implementing a voltage
offset of the commanded VID states. A 20kΩ resistor R
should be connected across the I2UA and VSS pins if the I
current source is unused.
Setting the PWM Switching Frequency
The R
architecture, lacking a fixed-frequency clock signal to
produce PWM. The switching frequency increases during
the application of a load to improve transient performance.
The static PWM frequency varies slightly depending on the
input voltage, output voltage, and output current, but this
variation is normally less than 10% in continuous conduction
mode.
Refer to Figure 2, and find that resistor R
between the V W and COMP pins. A current is sourced from
VW through R
voltage signal V
frequency. The relationship between the resistance of R
and the switching frequency in CCM is approximately given by
Equation 5:
For example, the value of R
approximately:
This relationship only applies to operation in constant
conduction mode because the PWM frequency naturally
decreases as the load decreases while in diode emulation
mode. Note that the Electrical Specifications table gives the
nominal PWM frequency of 333kHz with R
different from the result of equation Equation 6. This is
because the IC is trimmed with V
than the typical value encountered in a typical application.
Static Droop Design Using DCR Sensing
The ISL6263 has an internal differential amplifier to
accurately regulate the voltage at the processor die.
For DCR sensing, the process to compensate the DCR
resistance variation takes several iterative steps. Figure 2
R
7
×10
FSET
3
3
=
=
modulator scheme is not a fixed-frequency
--------------------------------------------------------------------------- -
(
3.33
----------------------------------------------------
(
T 0.29
–
×10
FSET
W
–
6
×10
1
which determines the PWM switching
–
creating the synthetic ripple window
0.29
–
1
6
) 47
⋅
×10
OCSET
FSET
–
14
6
) 47
⋅
COMP
for 300kHz operation is
that is sourced from the
= 2V which is higher
FSET
FSET
is connected
= 7kΩ,
I2UA
I2UA
(EQ. 5)
(EQ. 6)
. This
FSET
I2UA
ISL6263
shows the DCR sensing method. Figure 8 shows the
simplified model of the droop circuitry. The inductor DC
current generates a DC voltage drop on the inductor DCR.
Equation 7 gives this relationship:
An R-C network senses the voltage across the inductor to
get the inductor current information. R
NTC network consisting of R
choice of R
The first step in droop load line compensation is to adjust
R
appears even at light loads between the VSUM and VO pins.
As a rule of thumb, the voltage drop V
network, is set to be 0.5x to 0.8x V
G
which to derive the droop voltage.
The NTC network resistor value is dependent on
temperature and is given by Equation 8:
G
temperature of the NTC thermistor:
The inductor DCR is a function of temperature and is
approximately given by Equation 10:
The droop amplifier output voltage divided by the total load
current is given by Equation 11:
R
temperature coefficient of the copper. To make R
independent of the inductor temperature, it is desired to
have Equation 12:
where G
the temperature characteristics G
Equation 13:
It is recommended to begin your droop design using the
R
evaluation board available from Intersil.
V
R
G
DCR T ( )
R
G
G
DCR
NTCEQ
droop
NTC
1
N
1
droop
1
1
1
, provides a reasonable amount of light load signal from
, the gain of V
T ( )
T ( )
T ( )
T ( )
, R
⋅
=
=
=
=
is the actual load line slope, and 0.00393 is the
(
=
1
1target
, and R
NTCS
I
=
-------------------------------
R
-------------------------------------------------------------------- -
(
(
----------------------------------------------------------------------- -
o
R
+
1
G
R
N
⋅
DCR
S
NTC
R
0.00393
+
NTC
1
DCR
T ( )
T ( ) DCR
N
0.00393
will be discussed in the next section.
, and R
T ( )
+
is the desired ratio of V
+
25°C
+
S
⋅
N
G
R
R
R
such that the correct droop voltage
S
1t
NTCS
to V
NTCS
⋅
(
arg
⋅
⋅
T 25°C
(
NTCP
25°C
(
1
–
T 25°C
DCR
et
+
) R
–
+
⋅
0.00393
R
⋅
, is also dependent on the
(
NTCP
component values of the
NTCP
1
NTC
)
+
)
)
≅
0.00393
)
, R
G
⋅
1
DCR
(
1t
T 25°C
is described by
NTCS, and
arg
–
NTCEQ
N
. This gain, defined as
n
et
⋅
across the R
/ V
(
T 25°C
DCR
–
)
)
represents the
R
. Therefore,
NTCP
droop
)
) k
June 10, 2010
⋅
NTCEQ
(EQ. 10)
(EQ. 12)
(EQ. 13)
(EQ. 11)
. The
droopamp
FN9213.2
(EQ. 7)
(EQ. 8)
(EQ. 9)