ISL6333AIRZ-T Intersil, ISL6333AIRZ-T Datasheet - Page 34

• Manufacturer Part Number: ISL6333AIRZ-T
• Description: IC CTRLR PWM 3PHASE BUCK 48-QFN
• Manufacturer: Intersil

Specifications of ISL6333AIRZ-T

• Applications: Controller, Intel VR11
• Voltage - Input: 5 ~ 12 V
• Number Of Outputs: 1
• Voltage - Output: 0.5 ~ 1.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-VQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

.
Loadline Regulation Resistor
If load line regulation is desired on the ISL6333 and
ISL6333A, the IDROOP pin should be connected to the FB
pin in order for the internal average sense current to flow
out across the loadline regulation resistor, labeled R
Figure 7. The ISL6333B and ISL6333C always have the
load line regulation enabled. The R
the desired loadline required for the application. The
desired loadline, R
where V
current I
Based on the desired loadline, the loadline regulation
resistor, R
In Equation 37, R
number of active channels; DCR is the DCR of the individual
output inductors; and R
If no loadline regulation is required on the ISL6333 and
ISL6333A, the IDROOP pin should be left unconnected. To
choose the value for R
“Compensation Without Load-line Regulation” on page 35.
IMON Pin Resistor
A copy of the average sense current flows out of the IMON
pin, and a resistor, R
be used to set the overcurrent protection trip level. Based on
the desired overcurrent trip threshold, I
resistor, R
APA Pin Component Selection
A 100µA current flows into the APA pin and across R
set the APA trip level. A 1000pF capacitor, C
R
R
R
LL
IMON
FB
FIGURE 23. TIME CONSTANT MISMATCH BEHAVIOR
=
=
ΔV
V
------------------------ -
R
-------------------------------------- -
=
DROOP
FL
DROOP
1
LL
IMON
I
FB
------------------------------- -
DCR I
.
FL
R
⋅
DCR
, can be calculated from Equation 37.
N R
SET
⋅
, can be calculated from Equation 38.
⋅
is the desired droop voltage at the full load
OCP
⋅
SET
LL
N
LL
IMON
is the loadline resistance; N is the
, can be calculated by Equation 36
⋅
⋅
--------- -
400
FB
3.381
-------------- -
SET
400
3
, placed from this pin to ground can
in this situation, please refer to
is the RSET pin resistor.
34
FB
ISL6333, ISL6333A, ISL6333B, ISL6333C
OCP
resistor value sets
, the IMON pin
ΔV
ΔI
APA
2
, should
(EQ. 36)
V
I
TRAN
(EQ. 37)
(EQ. 38)
APA
OUT
FB
in
to
also be placed across the R
immunity. Use Equation 39 to set R
APA trip level. An APA trip level of 500mV is recommended
for most applications.
Compensation
The two opposing goals of compensating the voltage
regulator are stability and speed. Depending on whether the
regulator employs the optional load-line regulation as
described in Load-Line Regulation, there are two distinct
methods for achieving these goals.
COMPENSATION WITH LOAD-LINE REGULATION
The load-line regulated converter behaves in a similar
manner to a peak current mode controller because the two
poles at the output filter L-C resonant frequency split with the
introduction of current information into the control loop. The
final location of these poles is determined by the system
function, the gain of the current signal, and the value of the
compensation components, R
Since the system poles and zero are affected by the values
of the components that are meant to compensate them, the
solution to the system equation becomes fairly complicated.
Fortunately, there is a simple approximation that comes very
close to an optimal solution. Treating the system as though it
were a voltage-mode regulator, by compensating the L-C
poles and the ESR zero of the voltage mode approximation,
yields a solution that is always stable with very close to ideal
transient performance.
Select a target bandwidth for the compensated system, f
The target bandwidth must be large enough to assure
adequate transient performance, but smaller than 1/3 of the
per-channel switching frequency. The values of the
compensation components depend on the relationships of f
to the L-C pole frequency and the ESR zero frequency. For
each of the following three, there is a separate set of
equations for the compensation components.
R
FIGURE 24. COMPENSATION CONFIGURATION FOR
APA
=
V
-------------------------------- -
100
R
APA TRIP
FB
LOAD-LINE REGULATED ISL6333 CIRCUIT
×
(
10
–
R
6
C
)
=
C
2
---------------------------- -
100
C
(OPTIONAL)
500mV
C
×
APA
10
C
IDROOP
–
COMP
VDIFF
and C
resistor to help with noise
6
=
FB
APA
5kΩ
C
. See Figure 24.
to get the desired
ISL6333
October 8, 2010
(EQ. 39)
FN6520.3
0
.
0