ISL6312IRZ Intersil, ISL6312IRZ Datasheet - Page 13

• Manufacturer Part Number: ISL6312IRZ
• Description: IC CTRLR PWM 4PHASE BUCK 48-QFN
• Manufacturer: Intersil

Specifications of ISL6312IRZ

• Applications: Controller, Intel VR10, VR11, AMD CPU
• Voltage - Input: 5 ~ 12 V
• Number Of Outputs: 1
• Voltage - Output: 0.38 ~ 1.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-VQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

In some cases it may be necessary to use a resistor divider
R-C network to sense the current through the inductor. This
can be accomplished by placing a second resistor, R
across the sense capacitor. In these cases the voltage
across the sense capacitor, V
channel current I
If the R-C network components are selected such that the
RC time constant matches the inductor L/DCR time
constant, then V
DCR multiplied by the ratio of the resistor divider, K. If a
resistor divider is not being used, the value for K is 1.
The capacitor voltage V
sense resistor R
proportional to the inductor current. Equation 7 shows that
the proportion between the channel current and the sensed
current (I
the resistor divider ratio, and the DCR of the inductor.
Output Voltage Setting
The ISL6312 uses a digital to analog converter (DAC) to
generate a reference voltage based on the logic signals at
the VID pins. The DAC decodes the logic signals into one of
the discrete voltages shown in Tables 2, 3, 4 and 5. In Intel
modes of operation, each VID pin is pulled up to an internal
1.2V voltage by a weak current source (40µA), which
decreases to 0A as the voltage at the VID pin varies from 0
to the internal 1.2V pull-up voltage. In AMD modes of
operation the VID pins are pulled low by a weak 20µA
current source. External pull-up resistors or active-high
output stages can augment the pull-up current sources, up to
a voltage of 5V.
The ISL6312 accommodates four different DAC ranges: Intel
VR10 (Extended), Intel VR11, AMD K8/K9 5-bit, and AMD
6-bit. The state of the VRSEL and VID7 pins decide which
DAC version is active. Refer to Table 1 for a description of
how to select the desired DAC version. For VR11 setting, tie
the VRSEL pin to the midpoint of a 10kΩ (or other suitable
value) resistor divider connected from VCC to GND.
K
I
V
V
SEN
C
C
=
s ( )
s ( )
-------------------- -
R
=
2
=
=
R
+
K I
2
SEN
------------------------------------- - DCR I
(
------------------------------------------------------- - K DCR I
⎛
⎜
⎝
R
⋅
s R
s
⎛
⎝
1
⋅
L
-------------
DCR
⋅
s L
(
----------------------- - C
) is driven by the value of the sense resistor,
⋅
R
R
⋅
⎛
⎝
1
----------------- -
R
-------------
DCR
1
DCR
1
s L
⋅
ISEN
+
C
ISEN
C
L
⋅
⋅
+
R
, and the resistor divider ratio, K.
R
is equal to the voltage drop across the
1
+
2
2
⎞
⎠
+
1
)
. The current through R
)
⋅
1
⎞
⎠
⋅
C
+
, is then replicated across the
1
⎞
⎟
⎠
⋅
⋅
C
13
L
, becomes proportional to the
⋅
⋅
L
ISEN
is
2
(EQ. 4)
(EQ. 5)
(EQ. 6)
(EQ. 7)
,
ISL6312
VID4
VR10(Extended)
TABLE 2. VR10 (EXTENDED) VOLTAGE IDENTIFICATION
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
DAC VERSION
AMD 5-Bit
AMD 6-Bit
VR11
VID3
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
TABLE 1. ISL6312 DAC SELECT TABLE
CODES
VID2
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
VRSEL = VCC/2
VID1
VRSEL = GND
VRSEL = VCC
VRSEL = VCC
VRSEL PIN
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
VID0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
VID5
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
VID6
VID7 PIN
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
HIGH
LOW
-
-
February 1, 2011
1.60000
1.59375
1.58750
1.58125
1.57500
1.56875
1.56250
1.55625
1.55000
1.54375
1.53750
1.53125
1.52500
1.51875
1.51250
1.50625
1.50000
1.49375
1.48750
1.48125
1.47500
1.46875
1.46250
1.45625
1.45000
1.44375
1.43750
1.43125
1.42500
1.41875
1.41250
1.40625
VDAC
FN9289.6