ISL97656IRTZ-TK Intersil, ISL97656IRTZ-TK Datasheet
ISL97656IRTZ-TK
Specifications of ISL97656IRTZ-TK
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ISL97656IRTZ-TK Summary of contents
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... LX 6 ISL97656IRTZ ISL97656IRTZ-T* ISL97656IRTZ-TK* *Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations) ...
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... ISL97656 Thermal Information = +25°C) Thermal Resistance (Typical 3x3 TDFN Package (Notes 1, 2) Operating Ambient Temperature . . . . . . . . . . . . . . . .-40°C to +85°C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +135°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp = 12V 0mA, FREQ = GND, T OUT ...
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Block Diagram REFERENCE IN GENERATOR Pin Descriptions PIN NUMBER PIN NAME 1 COMP Compensation pin. Output of the internal error amplifier. Capacitor and resistor from COMP pin to ground Voltage feedback pin. Internal reference is 1.24V nominal. Connect ...
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Typical Performance Curves 3.0V 0.4 0.6 0.8 1.0 I OUT (A) FIGURE 1. 5V BOOST EFFICIENCY 12V 0.8 f ...
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Typical Performance Curves Applications Information The ISL97656 is a high frequency, high efficiency boost regulator operated at constant frequency PWM mode. The boost converter stores energy from an input voltage source and deliver higher output voltage. The ...
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ISL97656 I Δ ΔT 2 ΔV FIGURE 10. BOOST CONVERTER - CYCLE 2, POWER SWITCH OPEN Output Voltage An external feedback resistor divider is required to divide the output voltage down to ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...
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Package Outline Drawing L10.3x3B 10 LEAD THIN DUAL FLAT PACKAGE (TDFN) WITH E-PAD Rev 2, 03/10 3.00 6 PIN 1 INDEX AREA TOP VIEW PACKAGE OUTLINE (10x0.40) (10X0.25) (8x 0.50) 1.64 TYPICAL RECOMMENDED LAND PATTERN 8 ISL97656 ...