LTC3736EUF#TR Linear Technology, LTC3736EUF#TR Datasheet - Page 17

• Manufacturer Part Number: LTC3736EUF#TR
• Description: IC CTRLR SW SYNC DUAL 2PH 24QFN
• Manufacturer: Linear Technology
• Series: PolyPhase®r
• Type: Step-Down (Buck)r

Specifications of LTC3736EUF#TR

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 2
• Voltage - Output: 0.6 ~ 9.8 V
• Current - Output: 1A
• Frequency - Switching: 550kHz ~ 750kHz
• Voltage - Input: 2.75 ~ 9.8 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-QFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power - Output: -

APPLICATIO S I FOR ATIO
than ferrite. A reasonable compromise from the same
manufacturer is Kool Mµ. Toroids are very space efficient,
especially when you can use several layers of wire.
Because they lack a bobbin, mounting is more difficult.
However, designs for surface mount are available which
do not increase the height significantly.
Schottky Diode Selection (Optional)
The Schottky diodes D1 and D2 in Figure 16 conduct
current during the dead time between the conduction of
the power MOSFETs . This prevents the body diode of the
bottom N-channel MOSFET from turning on and storing
charge during the dead time, which could cost as much as
1% in efficiency. A 1A Schottky diode is generally a good
size for most LTC3736 applications, since it conducts a
relatively small average current. Larger diodes result in
additional transition losses due to their larger junction
capacitance. This diode may be omitted if the efficiency
loss can be tolerated.
C
The selection of C
ture and its impact on the worst-case RMS current drawn
through the input network (battery/fuse/capacitor). It can
be shown that the worst-case capacitor RMS current
occurs when only one controller is operating. The control-
ler with the highest (V
in the formula below to determine the maximum RMS
capacitor current requirement. Increasing the output cur-
rent drawn from the other controller will actually decrease
the input RMS ripple current from its maximum value. The
out-of-phase technique typically reduces the input
capacitor’s RMS ripple current by a factor of 30% to 70%
when compared to a single phase power supply solution.
In continuous mode, the source current of the P-channel
MOSFET is a square wave of duty cycle (V
prevent large voltage transients, a low ESR capacitor sized
for the maximum RMS current of one channel must be
used. The maximum RMS capacitor current is given by:
Kool Mµ is a registered trademark of Magnetics, Inc.
IN
C
and C
IN
Required I
OUT
Selection
IN
RMS
U
is simplified by the 2-phase architec-
OUT
≈
)(I
I
U
MAX
V
IN
OUT
[
) product needs to be used
(
V
OUT
W
)(
V
IN
–
OUT
V
OUT
U
)/(V
)
IN
]
/ 1 2
). To
This formula has a maximum at V
= I
used for design because even significant deviations do not
offer much relief. Note that capacitor manufacturers’
ripple current ratings are often based on only 2000 hours
of life. This makes it advisable to further derate the
capacitor, or to choose a capacitor rated at a higher
temperature than required. Several capacitors may be
paralleled to meet size or height requirements in the
design. Due to the high operating frequency of the LTC3736,
ceramic capacitors can also be used for C
consult the manufacturer if there is any question.
The benefit of the LTC3736 2-phase operation can be cal-
culated by using the equation above for the higher power
controller and then calculating the loss that would have
resulted if both controller channels switched on at the
same time. The total RMS power lost is lower when both
controllers are operating due to the reduced overlap of
current pulses required through the input capacitor’s ESR.
This is why the input capacitor’s requirement calculated
above for the worst-case controller is adequate for the
dual controller design. Also, the input protection fuse re-
sistance, battery resistance, and PC board trace resistance
losses are also reduced due to the reduced peak currents
in a 2-phase system. The overall benefit of a multiphase
design will only be fully realized when the source imped-
ance of the power supply/battery is included in the effi-
ciency testing. The sources of the P-channel MOSFETs
should be placed within 1cm of each other and share a
common C
duce undesirable voltage and current resonances at V
A small (0.1µF to 1µF) bypass capacitor between the chip
V
suggested. A 10Ω resistor placed between C
the V
channels.
The selection of C
resistance (ESR). Typically, once the ESR requirement is
satisfied, the capacitance is adequate for filtering. The
output ripple (∆V
IN
OUT
∆
pin and ground, placed close to the LTC3736, is also
V
IN
OUT
/2. This simple worst-case condition is commonly
pin provides further isolation between the two
≈
IN
I
(s). Separating the sources and C
RIPPLE
OUT
OUT
⎛
⎜
⎝
ESR
) is approximated by:
is driven by the effective series
+
8
fC
1
OUT
IN
⎞
⎟
⎠
= 2V
OUT
LTC3736
, where I
IN
IN
IN
. Always
may pro-
(C1) and
17
3736fa
RMS
IN
.