LTC3736EUF#TR Linear Technology, LTC3736EUF#TR Datasheet - Page 6

• Manufacturer Part Number: LTC3736EUF#TR
• Description: IC CTRLR SW SYNC DUAL 2PH 24QFN
• Manufacturer: Linear Technology
• Series: PolyPhase®r
• Type: Step-Down (Buck)r

Specifications of LTC3736EUF#TR

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 2
• Voltage - Output: 0.6 ~ 9.8 V
• Current - Output: 1A
• Frequency - Switching: 550kHz ~ 750kHz
• Voltage - Input: 2.75 ~ 9.8 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-QFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power - Output: -

PI FU CTIO S
LTC3736
I
Error Amplifier Compensation Point. Nominal operating
range on these pins is from 0.7V to 2V. The voltage on
these pins determines the threshold of the main current
comparator.
PLLLPF (Pin 3/Pin 6): Frequency Set/PLL Lowpass Filter.
When synchronizing to an external clock, this pin serves
as the lowpass filter point for the phase-locked loop. Nor-
mally a series RC is connected between this pin and ground.
When not synchronizing to an external clock, this pin serves
as the frequency select input. Tying this pin to GND selects
300kHz operation; tying this pin to V
eration. Floating this pin selects 550kHz operation.
SGND (Pin 4/Pin 7): Small-Signal Ground. This pin serves
as the ground connection for most internal circuits.
V
powers the entire chip except for the gate drivers. Externally
filtering this pin with a lowpass RC network (e.g.,
R = 10Ω, C = 1µF) is suggested to minimize noise pickup,
especially in high load current applications.
TRACK (Pin 6/Pin 9): Tracking Input for Second Control-
ler. Allows the start-up of V
according to a ratio established by a resistor divider on
V
ing of V
6
TYPICAL PERFOR A CE CHARACTERISTICS
TH1
IN
OUT1
U
/I
(Pin 5/Pin 8): Chip Signal Power Supply. This pin
TH2
connected to the TRACK pin. For one-to-one track-
OUT1
(Pins 1, 8/ Pins 4, 11): Current Threshold and
U
and V
20
18
16
14
12
10
OUT2
8
6
4
2
0
U
Shutdown Quiescent Current
vs Input Voltage
2
RUN/SS = 0V
during start-up, a resistor divider
3
(UF/GN Package)
W
4
OUT2
INPUT VOLTAGE (V)
5
to “track” that of V
U
6
IN
selects 750kHz op-
7
8
9
3736 G17
10
OUT1
with values equal to those connected to V
should be used to connect to TRACK from V
PGOOD(Pin 9/Pin 12): Power Good Output Voltage Moni-
tor Open-Drain Logic Output. This pin is pulled to ground
when the voltage on either feedback pin (V
within ±13.3% of its nominal set point.
PGND (Pins 12, 16, 20, 25/ Pins 15, 19, 23): Power
Ground. These pins serve as the ground connection for the
gate drivers and the negative input to the reverse current
comparators. The Exposed Pad (UF package) must be
soldered to PCB ground.
RUN/SS (Pin 14/Pin 17): Run Control Input and Optional
External Soft-Start Input. Forcing this pin below 0.65V shuts
down the chip (both channels). Driving this pin to V
releasing this pin enables the chip, using the chip’s inter-
nal soft-start. An external soft-start can be programmed by
connecting a capacitor between this pin and ground.
TG1/TG2 (Pins 17, 15/Pins 20, 18): Top (PMOS) Gate Drive
Output. These pins drive the gates of the external P-channel
MOSFETs. These pins have an output swing from PGND to
SENSE
SYNC/FCB (Pin 18/Pin 21): This pin performs three
functions: 1) auxiliary winding feedback input, 2) external
clock synchronization input for phase-locked loop, and 3)
Burst Mode operation or forced continuous mode select.
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
+
0
.
2
RUN/SS Start-Up Current
vs Input Voltage
RUN/SS = 0V
T
A
3
= 25°C unless otherwise noted.
4
INPUT VOLTAGE (V)
5
6
7
8
9
3736 G18
10
FB1
FB2
, V
OUT1
from V
FB2
.
) is not
IN
OUT2
3736fa
or