L6711 STMicroelectronics, L6711 Datasheet
L6711
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L6711 Summary of contents
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... An internal crowbar is provided turning on the low side mosfet if an over-voltage is detected. In case of over-current, the system works in Constant Current mode until UVP. Selectable current reading adds flexibility in system design. Package TQFP48 TQFP48 Rev 4 L6711 Packing Tube Tape & Reel 1/50 www.st.com 50 ...
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... Current reading and current sharing control loop . . . . . . . . . . . . . . . . 19 7.1 Low-side current reading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 7.2 Inductor current reading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 8 DAC Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 9 Remote voltage sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 10 Voltage positioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 10.1 Droop function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 10.2 Offset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 10.3 Integrated thermal sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 11 Dynamic VID transitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 11.1 VID_SEL = OPEN 11.2 VID_SEL = GND 2/50 L6711 ...
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... Power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 17 System control loop compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 18 Layout guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 18.1 Power connections 18.2 Power connections related 18.3 Current sense connections Embedding L6711-based VRDs... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 20 TQFP48 Mechanical data & package dimensions . . . . . . . . . . . . . . . . 48 21 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 TON Limited output voltage Constant current operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Contents 3/50 ...
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... Typical application circuit and block diagram 1.1 Application circuit Figure 1. Typical application circuit for LS MOSFET current sense V IN GND IN VID5 VID4 VID3 VID2 VID1 VID0 VID_SEL OUTEN L6711 REF. SCH. (MOSFET) 4/ VCCDR1 41 VCCDR2 38 45 VCCDR3 BOOT1 46 4 UGATE1 VCC 47 PHASE1 5,31 SGND 2 22 LGATE1 ...
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... L6711 Figure 2. Typical application circuit for inductor DCR current sense V IN GND IN VID5 VID4 VID3 VID2 VID1 VID0 VID_SEL OUTEN L6711 REF. SCH. (INDUCTOR) Typical application circuit and block diagram VCCDR1 41 VCCDR2 38 45 VCCDR3 BOOT1 46 4 UGATE1 VCC 47 PHASE1 5,31 SGND 2 ...
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... CURRENT SHARING CORRECTION PWM3 PWM3 CH3 CURRENT READING OUTEN OCP3 OCP1 OCP2 CH2 CURRENT OCP3 READING OCP2 TOTAL CURRENT CH1 CURRENT READING OCP1 64k 64k REMOTE 64k BUFFER 64k L6711 OVP VCC SGND CS_SEL CS3- CS3+ CS2- CS2+ CS1- CS1+ SS_END ...
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... Short to SGND to disable the offset generation or connect through a resistor R 6 OFFSET SGND to program an offset (positive or negative, depending on TC status) to the regulated output voltage as reported in the relative section. This pin is connected to the error amplifier output and is used to compensate the control 7 COMP feedback loop. Pins description and connection diagrams L6711 Description ...
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... Rg resistor. The net connecting the pin to the sense point must be routed as close as possible to the CS2+ net in order to couple in common mode any picked-up noise. 8/50 (continued) Description to SGND, it sets the OVP threshold to a fixed programmable OVP L6711 ...
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... L6711 Table 1. Pins description N° Name Channel 2 Current Sense Positive Input pin. It must be connected through an Rg resistor to the LS mosfet source (or to the GND-side of the sense resistor placed in series to the LS mosfet mosfet sense is performed (CS_SEL=OPEN). Otherwise (CS_SEL=SGND), it must be connected to the phase-side of 17 ...
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... Channel 2 HS driver supply. This pin supplies the relative high side driver. 44 BOOT2 Connect through a capacitor (100nF Typ.) to the PHASE2 pin and through a diode to VCC (cathode vs. boot). 10/50 (continued) Description Table 3). L6711 Table 5 and Table 6 together with Table 1) while short to SGND to use a ...
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... L6711 Table 1. Pins description N° Name Channel 1 HS driver supply. This pin supplies the relative high side driver. 45 BOOT1 Connect through a capacitor (100nF Typ.) to the PHASE1 pin and through a diode to VCC (cathode vs. boot). Channel 1 HS driver output. 46 UGATE1 A little series resistor helps in reducing device-dissipated power. ...
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... Thermal data Symbol Thermal Resistance Junction to Ambient R thJA (Device soldered on 2s2p PC Board) T Maximum junction temperature MAX T Storage temperature range STG T Junction Temperature Range J P Max power dissipation at T TOT 12/50 Parameter Parameter = L6711 Value Unit -0 Vcc+0 ±1500 V ±2000 V Value Unit ...
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... L6711 4 Electrical specifications Table 4. Electrical characteristcs (V CC Symbol V supply current CC I VCC supply current CC VCCDRx supply I CCDRx current I BOOTx supply current BOOTx Power-ON Turn-On VCC threshold Turn-Off VCC threshold Turn-On VCCDRx Threshold Turn-Off VCCDRx Threshold Oscillator and inhibit f Initial Accuracy OSC ...
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... COMP = 10pF VSEN = 10pF LOAD I (OCP)-I CSx- CSx- OFFSET = TC = SGND =0; I LOAD OFFSET TC = SGND I =0; I LOAD OFFSET TC Enabled 250 A OFFSET Min. Typ. Max. -0 4 -3.5 - +3.5 =100 A; -90 -100 =100mA; 90 100 0 - 1.240 L6711 Unit 0 -110 A 110 A 250 A V ...
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... L6711 Table 4. Electrical characteristcs (continued Symbol Thermal sensor TC Voltage 27ºC amb Gate drivers High Side t RISE HGATE Rise Time High Side I HGATEx Source Current High Side R HGATEx Sink Resistance Low Side t RISE LGATE Rise Time Low Side I LGATEx Source Current Low Side ...
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... Output 1.1935 1.2060 1.2185 1.2310 1.2435 1.2560 1.2685 1.2810 1.2935 1.3060 1.3185 1.3310 1.3435 1.3560 1.3685 1.3810 1.3935 1.4060 1.4185 1.4310 1.4435 1.4560 1.4685 1.4810 1.4935 1.5060 1.5185 1.5310 1.5435 1.5560 1.5685 1.5810 L6711 (V) ...
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... L6711 Table 6. Voltage IDentification (VID) Codes. HAMMER DAC VID5 VID4 VID3 VID2 VID1 VID0 VID_SEL = SGND (Hammer DAC) Output VID5 VID4 VID3 VID2 VID1 VID0 ( 1.550 1.525 1.500 1.475 1.450 1.425 1.400 1.375 1.350 1.325 1.300 1.275 1.250 1.225 1.200 1.175 ...
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... The device drives high the FAULT pin after each latching event: to recover it is enough to cycle VCC or the OUTEN pin. A compact 7x7mm body TQFP48 package with exposed thermal pad allows dissipating the power to drive the external mosfet through the system board. 18/50 L6711 ...
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... L6711 7 Current reading and current sharing control loop The device embeds a flexible, fully-differential current sense circuitry that is able to read across both low side or inductor parasitic resistance or across a sense resistor placed in series to that element. The fully-differential current reading rejects noise and allows placing sensing element in different locations without affecting the measurement's accuracy ...
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... I INFOX AVG ------ - ⎛ ⎞ ⎜ ⎟ I ----------------------------------------------- - PHASEx ⎜ ⎟ ⎜ ⎟ ⎠ ------- - PHASEx AVG INFO1 to give the correction to the PWMx Rg I CSx- CSx- I LGATEx PHASEx CSx its series and SENSE where NFOx INFOx PHASEx L6711 = DROOP + INFO2 Figure R L ------- - Rg ...
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... L6711 current information of each phase, information about the total current delivered ( INFO1 INFO2 INFO3 I )/3) is taken. I INFO3 in order to equalize the current carried by the three phases. Since Rg is designed considering the OC protection, to allow further flexibility in the system design, the resistor in series to CSx+ can be split in two resistors as shown in Figure 7 ...
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... Output voltage ranges from 0.800V to 1.550V with 25mV steps (See Output voltage ranges from 0.825V to 1.575V with 25mV steps (See Since the +25mV offset is programmed during the production stage, no further error is introduced to generate the offset since it is automatically recovered during the trimming stage. L6711 Table 5). Table 6). ...
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... L6711 9 Remote voltage sense The device embeds a Remote Sense Buffer to sense remotely the regulated voltage without any additional external components. In this way, the output voltage programmed is regulated between the remote buffer inputs compensating motherboard or connector losses. The very low-offset amplifier senses the output voltage remotely through the pins FBR and FBG (FBR is for the regulated voltage sense while FBG is for the ground sense) and reports this voltage internally at VSEN pin with unity gain eliminating the errors ...
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... COMP VSEN FBR FBG Vcore (Remote Sense OOP current (see Figure 9). This current, sign depends on TC OFFSET ESR DROP RESPONSE W ITH ROOP RESPONSE WITH D ROO sourced from the FB pin (see DROOP , see Figure 9). The voltage regulated is F L6711 FB DROOP ...
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... L6711 Since I depends on the current information about the three phases, the output DROOP characteristic vs. load current is given by: VID R – OOP Where R is the chosen sensing element resistance (Inductor DCR SENSE is the output current of the system and R whole power supply can be then represented by a "real" voltage generator with a voltage ...
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... OFFSET FB R OFFSET 1 OFFSET 1.240V VID 1 OFFSET FB R OFFSET is fixed by the FB Figure 11 and following section), the and no more subtracted as before): = VID V – ⎞ OS ⎠ 64k DROOP 64k COMP VSEN FBR Vcore (Remote Sense order to keep constant the TC L6711 FBG ...
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... L6711 The ITS circuit subtracts from the I temperature as follow (see considered): V T,I VID R = OUT OUT where ---------- - where A and B are positive constants depending on the value of the external resistor R (see Figure 12), T sensing element) temperature. The resistor R can be designed in order to zero the temperature influence on the output ...
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... The way in which the device modifies the reference depends on the VID_SEL status and then on the kind of DAC selected. Figure 13. Dynamic VID transition, VRD10.x DAC VID Clock VID [0,5] Int. Reference V out 28/50 OUT VID x 4 Step VID Transition Step VID Transition - VRD10.x DAC VRD10.x DAC L6711 needs to D-VID ...
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... L6711 11.1 VID_SEL = OPEN. Selecting the VRD10.x DAC, the device checks for VID code modifications on the rising edge of a clock that is three times the switching frequency of each phase and waits for a confirmation on the following falling edge. Once the new code is stable, on the next rising edge, the reference starts stepping up or down in LSB increments (12.5mV) every clock cycle (still 3· ...
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... VID after the transition has finished on the next rising edge. If the new VID code is more than 1 bit higher than the previous, the device will execute the transition stepping the reference every switching cycle until the new code has reached 30/50 L6711 ...
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... L6711 12 Enable and disable The device has three different supplies: VCC pin to supply the internal control logic, VCCDRx to supply the low side drivers and BOOTx to supply the high side drivers. If the voltage at pins VCC and VCCDRx are not above the turn on thresholds specified in the Electrical Characteristics, the device is shut down: all drivers keep the mosfets off to show high impedance to the load ...
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... Over Voltage Comparator is always enabled during soft start with a threshold equal to the 115% of the programmed reference or the threshold programmed by R section). Figure 15. Soft start CCDR V LGATEx V OUT SS_END 32/50 Turn ON threshold 2048 Clock Cycles (CH1=VOUT; CH2=LGATEx; CH3=SS_END) L6711 (see relevant OVP ...
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... L6711 14 Output voltage monitor and protections The device monitors through pin VSEN the regulated voltage in order to manage the OVP / UVP conditions. 14.1 UVP protection If the output voltage monitored by VSEN drops below the 60% of the reference voltage for more than one clock period, the device turns off all mosfets and the OSC/FAULT is driven high (5V). The condition is latched ...
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... R D-VID as follow: SENSE max -VID – ---------- - + -------------- Low Side Mosfet Sense D-VID + ---------- - + -------------- Inductor DCR Sense the additional current required by D-VID (when applicable). D-VID +5V SB +12V VCC VCCDR1 VCCDR2 VCCDR3 or inductor dsON OCPx as follow OUT(OCP) is the inductor current PP L6711 ...
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... L6711 14.5 Low side sense overcurrent (CS_SEL=OPEN) The device detects an Over Current condition for each phase when the current information I overcomes the fixed threshold of I INFOx keeps the relative LS mosfet on, skipping clock cycles, until the threshold is crossed back and IINFOx results being lower than the I the bottom of each inductor current ripple ...
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... OCPx 2 ⎠ ) while the OFF time depends on the application: onMAX 1 OCPx F = --------------------------------------- onMax OFF I SENSE max OUT OCP where I = -------------------------- - OCPx < skipping clock cycles. The high OCTH bottom. The worst-case OCPx but it can be OCPx Vout – MIN D-VID – ----------- - + ------------- - L6711 ...
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... L6711 Figure 18. Constant current operation Maximum current for each phase 14.6 Inductor sense over current (CS_SEL = SGND) The device detects an over current when the I Since the device always senses the current across the inductor, the I happen during the HS conduction time consequence of OCP detection, the device will turn OFF the HS mosfet and turns ON the LS mosfet of that phase until I threshold or until the next clock cycle ...
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... OSC 12-1.237 kHz 150kHz --------------------------- - ---------- - = OSC vs. switching frequency 75 100 125 150 [kHz connected OSC 6 7.422 10 150kHz = + ---------------------------- - R k OSC 7 6.457 10 150kHz + ---------------------------- - R k OSC 1000 800 600 400 200 0 150 250 350 450 550 650 750 SGND vs. Selected F [kHz] OSC SW L6711 850 ...
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... L6711 16 Driver section The integrated high-current drivers allow using different types of power MOS (also multiple MOS to reduce the equivalent R The drivers for the high-side mosfets use BOOTx pins for supply and PHASEx pins for return. The drivers for the low-side mosfets use VCCDRx pin for supply and PGNDx pin for return ...
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... GATE 40/ 2 GATE_MOSFET GATE_HS = V CC CCDR 300 0 250 0 200 0 150 0 100 48nC Q = 24n _HS Q = 124nC Q = 62n 72n 18n C G _HS G _HS G _HS 96nC 4nC Q = 47n C G _LS 500 7 00 900 Sw itc hing Freq uen cy [ hase = 3.3 ; · GATE_LS GATE_MOSFET L6711 = V BOOT ...
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... L6711 17 System control loop compensation The control loop is composed by the Current Sharing control loop and the Average Current Mode control loop. Each loop gives, with a proper gain, the correction to the PWM in order to minimize the error in its regulation: the Current Sharing control loop equalize the currents in the inductors while the Average Current Mode control loop fixes the output voltage equal to the reference programmed by VID ...
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... F -C series network is considered for the =1 then introduced together with an integrator. This desired obtaining ------------------------------------------------------ - ESR DROOP the oscillator ramp OSC ⎞ ⎠ //Ro + ESR DROOP ESR --------------- + + ESR + D ROOP ESR + Co ------ - + and imposing the cross L6711 ------ - + ...
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... L6711 Figure 22. Equivalent Control Loop Gain Block Diagram (left) and Bode Diagram (right ⎡ ⎢ ⎣ System control loop compensation dB G LOOP ⎤ OSC FB ⎦ ( 43/50 ...
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... Figure 23. Power connections and related connections layout guidelines (same for all phases). UGATEx PHASEx LGATEx PGNDx a. PCB power and ground planes areas 44/ least a portion of the total capacitance needed, has limit BOOTx PHASEx VCC LOAD SGND b. PCB small signal components placement Extra-Charge BOOT LOAD +Vcc L6711 ...
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... L6711 18.2 Power connections related. Figure 24 shows some small signal components placement. Gate and phase traces must be sized according to the driver RMS current delivered to the power mosfet. The device robustness allows managing applications with the power section far from the controller without losing performances. Anyway, when possible suggested to minimize the distance between controller and power section ...
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... It's also important to avoid any offset in the measurement and, to get a better precision, to connect the traces as close as possible to the sensing elements. Symmetrical layout is also suggested. Small filtering capacitor can be needed between VOUT and SGND on the CSx- line, placed near the controller, allowing higher layout flexibility in the current sense connection. 46/50 L6711 ...
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... To reduce noise emission levels also possible, in addition to the previous guidelines, to reduce the current slope and then to increase the switching times: this will cause consequence of the higher switching time, an increase in switching losses that must be considered in the thermal design of the system. Embedding L6711-based VRDs... 47/50 ...
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... Body 1.0mm 0.217 0.019 0.75 0.018 0.024 0.030 0.039 0.08 0.0031 OUTLINE AND MECHANICAL DATA TQFP48 - EXPOSED PAD 7222746 B L6711 ...
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... L6711 21 Revision history Table 8. Revision History Date 01-Jun-2004 23-Nov-2004 26-Oct-2005 18-Apr-2006 Revision 1 First Issue 2 Modificated the Paragraph 18.2 on the page 32/38. 3 Added new paragraph 9.1.2 Warning 2. 4 Updated graphic, Modified Table1 Revision history Changes 49/50 ...
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