IDT72V51436L7-5BBI IDT, Integrated Device Technology Inc, IDT72V51436L7-5BBI Datasheet - Page 46

IC FLOW CTRL MULTI QUEUE 256-BGA

IDT72V51436L7-5BBI

Manufacturer Part Number
IDT72V51436L7-5BBI
Description
IC FLOW CTRL MULTI QUEUE 256-BGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT72V51436L7-5BBI

Configuration
Dual
Density
512Kb
Access Time (max)
4ns
Word Size
36b
Sync/async
Synchronous
Expandable
Yes
Bus Direction
Uni-Directional
Package Type
BGA
Clock Freq (max)
133MHz
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3.15V
Operating Supply Voltage (max)
3.6V
Supply Current
100mA
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
256
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
72V51436L7-5BBI
NOTE:
1. The waveform here shows the PAE flag operation when no queue switches are occurring and a queue selected on both the write and read ports is being written to then read
Cycle:
*A* Queue 12 of Device 1 is selected on the read port. A queue within Device 2 had previously been selected. The PAE flag output and the data outputs of device 1 are High-Impedance.
*B* No read occurs.
*C* The PAE flag output now switches to device 1. Word, Wn is read from Q12 due to the FWFT operation. This read operation from Q12 is at the almost empty boundary, therefore
*D* Q15 of device 1 is selected.
*E* The PAE flag goes LOW due to the read from Q12 2 RCLK cycles earlier. Word Wn+1 is read out due to the FWFT operation.
*F* Word, W0 is read from Q15 due to the FWFT operation. The PAE flag goes HIGH to show that Q15 is not almost empty.
IDT72V51436/72V51446/72V51456 3.3V, MULTI-QUEUE FLOW-CONTROL DEVICES
(16 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits
PAE
(Device 1)
PAE
(Device 2)
WCLK
RDADD
RADEN
RCLK
WEN
REN
from at the almost empty boundary.
Flag Latencies:
Assertion: 2*RCLK + t
De-assertion: t
If t
RCLK
PAE
PAE will go LOW 2 RCLK cycles later.
Qout
REN
SKEW2
is violated there will be one extra RCLK cycle.
HIGH
HIGH-Z
HIGH-Z
SKEW2
t
t
CLKH
AS
t
QS
+ RCLK + t
D
RAE
t
ENS
*A*
1
n+1 words in Queue
Q
t
CLKL
12
t
QH
RAE
t
AH
t
ENH
t
SKEW2
*B*
Figure 24. Almost Empty Flag Timing and Queue Switch
t
RAE
t
OLZ
Figure 25. Almost Empty Flag Timing
*C*
t
A
t
AEHZ
t
AELZ
t
t
AS
QS
HIGH-Z
D
46
1
*D*
Q
t
15
ENS
D
1
t
QH
Q
t
AH
12
n+2 words in Queue
W
n
*E*
t
ENH
t
A
t
RAE
D
1
Q
1
30
W
*F*
COMMERCIAL AND INDUSTRIAL
n+1
t
A
t
t
RAE
RAE
TEMPERATURE RANGES
D
1
Q
15
2
*G*
W
0
n+1 words in Queue
t
A
D
1
Q
5935 drw28
5935 drw27
15
W
1

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