STV0674T100 STMicroelectronics, STV0674T100 Datasheet - Page 6

IC PROCSR CAM CMOS DGITL 100TQFP

STV0674T100

Manufacturer Part Number
STV0674T100
Description
IC PROCSR CAM CMOS DGITL 100TQFP
Manufacturer
STMicroelectronics
Datasheet

Specifications of STV0674T100

Applications
*
Mounting Type
Surface Mount
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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STV0674 Functional Description
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2.1
2.2
2.3
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STV0674 Functional Description
The STV0674 uses a combination of hardware functions and firmware to implement the required
features. While the following features are selected and controlled via firmware their operation is
carried out by dedicated hardware core. All dedicated hardware functions use fixed pin numbers
which are detailed in
Sensor interface
The sensor interface is compatible with ST Microelectronics CIF and VGA sensors. This interface
consists of a 5-wire sensor data output with additional sync signals, clocking, and I
configuration. All sensor communications, exposure/gain control, color processing, white balance
control, and clocking are handled automatically by STV0674.
Video processor
The video processor (VP) provides formatted YCbCr 4:2:2-sampled digital video at frame rates up
to 30 frames per second to the video compressor (VC) module or internal video FIFO. The VP also
interfaces directly to the image sensors. The interface to the sensor incorporates:
The video processing engine performs the following functions on incoming data
Video compressor
The video compression engine performs 3 main functions:
The data stream from the VP can be up to VGA size. The scaler in VC can downsize this image.
Once scaled, the video stream is then converted into M-JPEG format. M-JPEG treats video as a
series of JPEG still images. The conversion is released via a sequential DCT (Discrete Cosine
Transform) with Huffman encoding. After transfer through the digiport or over USB, the M-JPEG
stream can be decoded in the host.
a 5-wire data bus SDATA[4:0] that receives both video data and embedded timing references.
a 2-wire serial interface SSDA,SSCL that controls the sensor and the sensor register
configuration.
the sensor clock SCLK.
full colour restoration at each pixel site from Bayer-patterned input data
defect correction
matrixing/gain on each colour channel for colour purity
auto white balance, exposure and gain control
peaking for image clarity
gamma correction
colour space conversion (including hue and saturation control) from raw RGB to YCbCr[4:2:2].
Up scaling of input YCbCr 4:2:2 video stream from the VP (typically to scale from QVGA to CIF
image formats),
Compression and encoding of YCbCr stream into Motion-JPEG (M-JPEG) format,
FIFO monitoring.
Section 5.2
.
2
C interface for
STV0674

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