STV0974E/TR STMicroelectronics, STV0974E/TR Datasheet - Page 64

• Manufacturer Part Number: STV0974E/TR
• Description: IC DSP IMAGING VGA CMOS 6X6TFBGA
• Manufacturer: STMicroelectronics

Specifications of STV0974E/TR

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 56-TFBGA
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• For Use With: 497-3891 - KIT DEMO W/VS6552
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-3887-2; STV0974E/TR

STV0974
7
PCB layout guide lines for the STV0974 and VS6552
Normal good PCB design practice should be observed for the layout of the STV0974.
Power and ground planes should be used to supply power to STV0974.
The high speed subLVDS signal pairs (PCLKP,PCLKN) and (PDATAP,PDATAN) should be routed as
balanced transmissions lines with a characteristic balanced impedance of between 80 to 120 Ω.
The two traces in the signal pair should be routed together and should be matched in length to
within +/-3mm. The pairs of balanced line traces should be matched in length to within +/- 10mm.
To save components, 100 Ω termination resistors are embedded in the high speed subLVDS signal
pairs (PCLKP/PCLKN) and (PDATAP/PDATAN) of the STV0974.
All passive components for the STV0974 should be placed in close proximity to the device,
including the decoupling capacitors. The decoupling capacitors for the VS6552 should be placed
close to the sensor.
PCB layout guide lines for the STV0974 and VS6552
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