KS8995XA Micrel Inc, KS8995XA Datasheet - Page 11
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KS8995XA
Manufacturer Part Number
KS8995XA
Description
IC SWITCH 10/100 5PORT 128PQFP
Manufacturer
Micrel Inc
Specifications of KS8995XA
Applications
*
Mounting Type
Surface Mount
Package / Case
128-MQFP, 128-PQFP
Number Of Primary Switch Ports
5
Internal Memory Buffer Size
64
Operating Supply Voltage (typ)
1.8/2.5/3.3V
Fiber Support
Yes
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII/SNI
Power Supply Type
Analog/Digital
Package Type
PQFP
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
576-1604 - EVAL KIT EXPERIMENTAL KS8995XA
Lead Free Status / RoHS Status
Not Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
KS8995XA
Manufacturer:
TOSHIBA
Quantity:
32
Part Number:
KS8995XA
Manufacturer:
KENDIN
Quantity:
20 000
Notes:
1. P = Power supply.
2. PU = Strap pin pull-up.
May 2005
KS8995XA
Pin Number
I = Input.
O = Output.
I/O = Bidirectional.
Gnd = Ground.
Ipu = Input w/internal pull-up.
Ipd = Input w/internal pull-down.
Ipd/O = Input w/internal pull-down during reset, output pin otherwise.
Ipu/O = Input w/internal pull-up during reset, output pin otherwise.
PD = Strap pull-down.
Otri = Output tristated.
100
101
102
103
104
105
106
107
108
86
87
88
89
90
91
92
93
94
95
96
97
98
99
Pin Name
SCONF1
SCONF0
LED5-2
LED5-1
LED5-0
LED4-2
LED4-1
LED4-0
LED3-2
LED3-1
LED3-0
LED2-2
LED2-1
LED2-0
LED1-2
LED1-1
LED1-0
VDDIO
GNDD
GNDD
VDDC
MDIO
MDC
Type
Ipu/O
Ipu/O
Ipu/O
Ipu/O
Ipu/O
Ipu/O
Ipu/O
Ipu/O
Ipu/O
Ipu/O
Ipu/O
Ipu/O
Ipu/O
Ipu/O
Ipu/O
Ipu/O
Gnd
Gnd
Ipd
Ipd
Ipu
P
P
(1)
Port
All
All
5
5
5
4
4
4
3
3
3
2
2
2
1
1
1
Pin Function
Dual MII configuration pin.
Pin# (91, 86, 87):
000
001
010
011
100
101
110
111
Dual MII configuration pin.
Digital ground.
1.8V digital core V
LED indicator 2. Aging setup. See “Aging” section.
LED indicator 1. Strap option: PU (default): enable PHY MII I/F.
PD: tristate all PHY MII output. See “Pin# 86 SCONF1.”
LED indicator 0.
LED indicator 2.
LED indicator 1.
LED indicator 0.
LED indicator 2.
LED indicator 1.
LED indicator 0.
Digital ground.
3.3V digital V
LED indicator 2.
LED indicator 1.
LED indicator 0.
LED indicator 2.
LED indicator 1.
LED indicator 0.
Switch or PHY[5] MII management data clock.
Switch or PHY[5] MII management data I/O.
11
DD
(2)
for digital I/O.
DD
.
Switch MII
Disable, Otri
PHY Mode MII
MAC Mode MII
PHY Mode SNI
Disable
PHY Mode MII
MAC Mode MII
PHY Mode SNI
PHY [5] MII
Disable, Otri
Disable, Otri
Disable, Otri
Disable, Otri
Disable
PHY Mode MII
PHY Mode MII
PHY Mode MII
M9999-051305
Micrel, Inc.