KS8993MI Micrel Inc, KS8993MI Datasheet - Page 41

IC SWITCH 10/100 3PORT 128PQFP

KS8993MI

Manufacturer Part Number
KS8993MI
Description
IC SWITCH 10/100 3PORT 128PQFP
Manufacturer
Micrel Inc
Datasheets

Specifications of KS8993MI

Applications
*
Mounting Type
Surface Mount
Package / Case
128-MQFP, 128-PQFP
Number Of Primary Switch Ports
3
Internal Memory Buffer Size
32
Operating Supply Voltage (typ)
1.8/2.5/3.3V
Fiber Support
Yes
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII/SNI
Power Supply Type
Analog/Digital
Package Type
PQFP
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
1.89/3.465V
Operating Supply Voltage (min)
1.71/3.135V
Power Dissipation
800mW
Supply Current
0.1/0.19A
Operating Temperature Classification
Industrial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
576-1013 - BOARD EVAL EXPERIMENT KS8993M
Lead Free Status / RoHS Status
Not Compliant, Contains lead / RoHS non-compliant
Other names
576-1014

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
KS8993MI
Manufacturer:
Micrel Inc
Quantity:
10 000
SPI multiple read is initiated when the master device continues to drive the KSZ8993M SPIS_N input pin (SPI
Slave Select signal) low after a byte (a register) is read. The KSZ8993M internal address counter will increment
automatically to the next byte (next register) after the read. The next byte at the next register address will be
shifted out onto the KSZ8993M SPIQ output pin. SPI multiple read will continue until the SPI master device
terminates it by de-asserting the SPIS_N signal to the KSZ8993M.
Similarly, SPI multiple write is initiated when the master device continues to drive the KSZ8993M SPIS_N input
pin low after a byte (a register) is written. The KSZ8993M internal address counter will increment automatically to
the next byte (next register) after the write. The next byte that is sent from the master device to the KSZ8993M
SDA input pin will be written to the next register address. SPI multiple write will continue until the SPI master
device terminates it by de-asserting the SPIS_N signal to the KSZ8993M.
For both SPI multiple read and multiple write, the KSZ8993M internal address counter will wrap back to register
address zero once the highest register address is reached. This feature allows all 128 KSZ8993M registers to be
read, or written with a single SPI command and any initial register address.
The following is a sample procedure for programming the KSZ8993M using the SPI bus:
1. At the board level, connect the KSZ8993M pins as follows:
2. Enable SPI slave mode by setting the KSZ8993M strap-in pins PS[1:0] (pins 100 and 101, respectively) to
3. Power up the board and assert reset to the KSZ8993M.
4. Configure the desired register settings in the KSZ8993M, using the SPI write or multiple write command.
5. Read back and verify the register settings in the KSZ8993M, using the SPI read or multiple read command.
6. Write a ‘1’ to the “Start Switch” bit to start the KSZ8993M with the programmed settings.
Note: The “Start Switch” bit cannot be set to ‘0’ to stop the switch after an ‘1’ is written to this bit. Thus, it is
recommended that all switch configuration settings are programmed before the “Start Switch” bit is set to ‘1’.
Some of the configuration settings, such as “Aging enable”, “Auto Negotiation Enable”, “Force Speed” and “Power
down” can be programmed after the switch has been started.
The following four figures illustrate the SPI data cycles for “Write”, “Read”, “Multiple Write” and “Multiple Read”.
The read data is registered out of SPIQ on the falling edge of SPIC, and the data input on SPID is registered on
the rising edge of SPIC.
The KSZ8993M is capable of supporting a 5MHz SPI bus.
Micrel, Inc.
October 2008
“10”.
After reset, the “Start Switch” bit (register 1 bit 0) will be set to ‘0’.
KSZ8993M Pin #
99
97
98
96
KSZ8993M Signal Name
SPIS_N
SCL
(SPIC)
SDA
(SPID)
SPIQ
Table 11. KSZ8993M SPI Connections
41
External Processor Signal Description
SPI Slave Select
SPI Clock
SPI Data
(Master output; Slave input)
SPI Data
(Master input; Slave output)
M9999-020606
KSZ8993M/ML

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