PXB 4219 E V3.4 Infineon Technologies, PXB 4219 E V3.4 Datasheet - Page 172

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PXB 4219 E V3.4

Manufacturer Part Number
PXB 4219 E V3.4
Description
IC ATM/IP INTERWORKING BGA-256
Manufacturer
Infineon Technologies
Datasheet

Specifications of PXB 4219 E V3.4

Applications
*
Mounting Type
Surface Mount
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
PXB4219EV3.4
SP000007681
ut_par
ex_par
crv_par
oq_ovf
eq_ovf
ck_eme
Note: Bits 6:0 are used for tracing error events. They are set on the occurrence of an
Data Sheet
error event and reset by a microprocessor read operation.
Bits 15:10 Bits are reset upon reading of the interrupt generating register.
Parity error on UTOPIA bus
Parity error on external RAM
In order to prevent external RAM parity errors, the external RAM should
be written completely during board initialization by the microprocessor.
0 =
1 =
Parity error on clock recovery interface
0 =
1 =
Output queue overflow
0 =
1 =
Error queue overflow
0 =
1 =
Emergency mode state change on one of the emergency mode enabled
ports (see ckmo)
0 =
1 =
False
True
False
True
False
True
False
True
False
True
172
PXB 4219E, PXB 4220E, PXB 4221E
Register Description
IWE8, V3.4
2003-01-20

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