SLE 66CLX640P M8.4 Infineon Technologies, SLE 66CLX640P M8.4 Datasheet - Page 4

• Manufacturer Part Number: SLE 66CLX640P M8.4
• Description: IC SEC CTRLR DUAL 16BIT M8.4
• Manufacturer: Infineon Technologies

Specifications of SLE 66CLX640P M8.4

• Applications: *
• Package / Case: M8.4 Chip Card Module
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Mounting Type: -
• Other names: SLE66CLX640PM8.4; SP000067542

µµ
Full operation either via Contact-based
and/or Contactless interfaces
controlled by Operating System
enhances Security Level
Contact-based Interface
Contactless Interface
Short Product Information
Contact configuration and serial
interface according to ISO/IEC 7816
UART handling serial interface compliant
with ISO/IEC 7816 supporting
transmission protocols T=0 and T=1
Supply voltage range:
5V ± 10% (Class A)
3V ± 10% (Class B)
Current consumption < 10 mA @ 5.5 V
External CPU clock frequency:
1 to 7.5 MHz
Internal CPU clock frequency:
up to 15 MHz
ESD protection larger than 6 kV
Interface according to ISO/IEC 14443 for
both Type A and Type B
Carrier frequency 13.56 MHz
Data rate
106 Kbit/s in type A operation
up to 848 Kbit/s in type B operation
Anticollision & Transmission Protocol
supported by open source application
notes for both Type A & B
Flexible Internal CPU clock frequency:
fully configurable from 1.7MHz up to
15 MHz
256 bytes buffer for contactless data
exchange (FiFo circular architecture)
Parallel operation of CPU, Peripherals
like DES, CRC and Contactless Interface
possible for High Demanding
Contactless Applications
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EEPROM (SuperSlim Technology)
Memory Management and Protection
Unit
1)
Values are temperature dependant
Byte wise EEPROM programming and read
accesses
Versatile & Flexible page mode for 1 to 256
bytes write/erase operation
32 bytes security area including:
- 16 bytes chip unique identification number
- 16 bytes PROM area (OTP like)
Fast personalisation mode 1.5 ms
Typical Page Erase time < 2.5ms
Typical Page Writing time < 1.8 ms
Minimum of 100.000 Write/erase cycles
Data retention for a minimum of 10 years
EEPROM programming voltage generated
on chip
Addressable memory up to 1 Mbytes
Separates OS (system mode) and
Application (application mode)
System routines called by traps
Access Restrictions to peripherals in
application mode controlled by OS
Code execution from XRAM possible
SLE 66CLX640P
2004-04-27
1)
1)