HCPL-2630 Avago Technologies US Inc., HCPL-2630 Datasheet - Page 12

OPTOCPLR 2CH LOG-OUT 10MBD 8-DIP

HCPL-2630

Manufacturer Part Number
HCPL-2630
Description
OPTOCPLR 2CH LOG-OUT 10MBD 8-DIP
Manufacturer
Avago Technologies US Inc.
Type
Logicr
Datasheets

Specifications of HCPL-2630

Voltage - Isolation
3750Vrms
Number Of Channels
2, Unidirectional
Current - Output / Channel
50mA
Data Rate
10MBd
Propagation Delay High - Low @ If
50ns @ 7.5mA
Current - Dc Forward (if)
20mA
Input Type
DC
Output Type
Open Collector
Mounting Type
Through Hole
Package / Case
8-DIP (0.300", 7.62mm)
No. Of Channels
2
Isolation Voltage
3.75kV
Optocoupler Output Type
Logic Gate
Input Current
15mA
Output Voltage
7V
Opto Case Style
DIP
No. Of Pins
8
Propagation Delay Low-high
100ns
Common Mode Voltage Vcm
10V
Package Type
8-Pin DIP
Special Features
2 Channel
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
516-1086-5

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Package Characteristics
Over recommended temperature (T
*All typicals at T
**The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output
continuous voltage rating. For the continuous voltage rating refer to the VDE 0884 Insulation Related Characteristics Table (if
applicable), your equipment level safety specification or HP Application Note 1074 entitled “Optocoupler Input-Output Endurance
Voltage,” publication number 5963-2203E.
Notes:
10. The frequency at which the ac output voltage is 3 dB below its mid-frequency value.
11. The JEDEC registration for the 6N136 specifies a minimum CTR of 15%. HP guarantees a minimum CTR of 19%.
12. See Option 020 data sheet for more information.
13. Use of a 0.1 f bypass capacitor connected between pins 5 and 8 is recommended.
14. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage
15. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage
16. This rating is equally validated by an equivalent ac proof test.
1. Derate linearly above 70 C free-air temperature at a rate of 0.8 mA/ C (8-Pin DIP).
2. Derate linearly above 70 C free-air temperature at a rate of 1.6 mA/ C (8-Pin DIP).
3. Derate linearly above 70 C free-air temperature at a rate of 0.9 mW/ C (8-Pin DIP).
4. Derate linearly above 70 C free-air temperature at a rate of 2.0 mW/ C (8-Pin DIP).
5. CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current, I
6. Device considered a two-terminal device: Pins 1, 2, 3, and 4 shorted together and Pins 5, 6, 7, and 8 shorted together.
7. Common mode transient immunity in a Logic High level is the maximum tolerable (positive) dV
8. The 1.9 k load represents 1 TTL unit load of 1.6 mA and the 5.6 k
9. The 4.1 k load represents 1 LSTTL unit load of 0.36 mA and 6.1 k
Input-Output
Momentary
Withstand
Voltage**
Input-Output
Resistance
Input-Output
Capacitance
Derate linearly above 85 C free-air temperature at a rate of 0.5 mA/ C (SO-8).
Derate linearly above 85 C free-air temperature at a rate of 1.0 mA/ C (SO-8).
Derate linearly above 85 C free-air temperature at a rate of 1.1 mW/ C (SO-8).
Derate linearly above 85 C free-air temperature at a rate of 2.3 mW/ C (SO-8).
times 100.
common mode pulse signal, V
transient immunity in a Logic Low level is the maximum tolerable (negative) dV
signal, V
(leakage detection current limit, I
Insulation Related Characteristics Table if applicable.
(leakage detection current limit, I
Insulation Related Characteristics Table if applicable.
Parameter
CM
, to assure that the output will remain in a Logic Low state (i.e., V
A
= 25 C.
Sym.
V
R
C
I
I-O
ISO
I-O
I-O
CM
, to assure that the output will remain in a Logic High state (i.e., V
(Option 020)
I-O
I-O
Widebody
Widebody
8-Pin DIP
8-Pin DIP
8-Pin DIP
8-Pin DIP
8-Pin DIP
Widebody
Device
SO-8
SO-8
SO-8
5 A). This test is performed before the 100% Production test shown in the VDE 0884
5 A). This test is performed before the 100% Production test shown in the VDE 0884
A
= 0 C to 70 C) unless otherwise specified.
2500
5000
5000
Min. Typ.*
10
10
12
11
10
10
0.6
0.5
12
13
pull-up resistor.
pull-up resistor.
Max.
0.6
1
O
< 0.8 V).
CM
Units
V rms
/dt on the trailing edge of the common mode pulse
pF
A
Test Conditions
RH < 50%,
t = 1 min.,
T
45% RH, t = 5 s,
V
T
V
T
T
f = 1 MHz
O
A
A
A
A
I-O
, to the forward LED input current, I
I-O
= 25 C
= 25 C
= 25 C
= 100 C
CM
= 3 kVdc,
= 500 Vdc
/dt on the leading edge of the
O
> 2.0 V). Common mode
3000 V rms for 1 second
6000 V rms for 1 second
Fig.
6, 12,
Note
6, 15
6, 14
6, 16
15
1-27
6
6
F
,

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