HCPL-7710#360 Avago Technologies US Inc., HCPL-7710#360 Datasheet
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HCPL-7710#360
Specifications of HCPL-7710#360
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HCPL-7710#360 Summary of contents
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... GND 2 • Microprocessor system interface Recognized 3750 V rms for 1 min. per UL 1577 5000 V rms for 1 min. per UL 1577 (for HCPL-7710 option 020) CSA Component Acceptance Notice #5 IEC/EN/DIN EN 60747-5-2 – 630 Vpeak for HCPL-7710 Option 060 IORM – 560 Vpeak for HCPL-0710 Option 060 ...
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... To order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. Example 1: HCPL-7710-560E to order product of Gull Wing Surface Mount package in Tape and Reel packaging with IEC/EN/ DIN EN 60747-5-2 Safety Approval in RoHS compliant. Example 2: HCPL-0710 to order product of Small Outline SO-8 package in tube packaging and non RoHS compliant ...
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... TYPE NUMBER A XXXX YYWW 1.19 (0.047) MAX. 1.080 ± 0.320 (0.043 ± 0.013) Package Outline Drawing HCPL-7710 Package with Gull Wing Surface Mount Option 300 9.65 ± 0.25 (0.380 ± 0.010 1.19 (0.047) MAX. 1.080 ± 0.320 (0.043 ± 0.013) 2 ...
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... Package Outline Drawing HCPL-0710 Outline Drawing (Small Outline SO-8 Package XXXV 3.937 ± 0.127 YWW (0.155 ± 0.005 PIN ONE 0.406 ± 0.076 (0.016 ± 0.003) * 5.080 ± 0.127 (0.200 ± 0.005) 3.175 ± 0.127 (0.125 ± 0.005) * TOTAL PACKAGE LENGTH (INCLUSIVE OF MOLD FLASH) 5.207 ± ...
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... T = 200 ° 150 °C smax smin Note: Non-halide flux should be used. Regulatory Information The HCPL-x710 have been approved by the following organizations: UL Recognized under UL 1577, component recognition program, File E55361. CSA Approved under CSA Component Acceptance Notice #5, File CA 88324. Insulation and Safety Related Specifications ...
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... Solder Reflow Temperature Profile Recommended Operating Conditions Parameter Ambient Operating Temperature Supply Voltages Logic High Input Voltage Logic Low Input Voltage Input Signal Rise and Fall Times 6 HCPL-7710 HCPL-0710 Symbol Option 060 Option 060 I-IV I-IV I-IV I-III I-III 55/100/21 55/100/21 ...
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Electrical Specifications Test conditions that are not specified can be anywhere within the recommended operating range. All typical specifications are +25° Specifications Parameter Logic Low Input Supply Current [1] Logic High Input Supply Current ...
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... Mimimum Pulse Width is the shortest pulse width at which 10% maximum, Pulse Width Distortion can be guaranteed. Maximum Data Rate is the inverse of Minimum Pulse Width. Operating the HCPL-x710 at data rates above 12.5 MBd is possible provided PWD and data dependent jitter increases and relaxed noise margins are tolerable within the application. For instance, if the maximum allowable variation of bit width is 30%, the maximum data rate becomes 37 ...
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... Figure 11. Thermal derating curve, dependence of Safety Limiting Value with case temperature per IEC/EN/DIN EN 60747-5- (C) A Figure 6. Typical fall time vs. temperature. HCPL-0710 fig (pF) I Figure 9. Typical rise time vs. load capacitance. HCPL-0710 fig 9 SURFACE MOUNT SO8 PRODUCT 800 P (mW) S 700 I (mA) S 600 500 400 300 200 (150) 100 100 125 150 175 200 CASE TEMPERATURE - C A ...
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... Application Information Bypassing and PC Board Layout The HCPL-x710 optocouplers are extremely easy to use. No external interface circuitry is required because the HCPL-x710 use high-speed CMOS IC technology allowing CMOS logic to be connected directly to the inputs and outputs. As shown in Figure 12, the only external components V 1 DD1 ...
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... PWD (in ns) by the minimum pulse width (in ns) being transmitted. Typically, PWD on the order 30% of the minimum pulse width is tolerable. The PWD specification for the HCPL-x710 (10%) maximum across recommend- ed operating conditions. 10% maximum is dictated by the most stringent of the three fieldbus standards, PROFIBUS. ...
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... Isolation of nodes connected to any of the three types of digital field bus networks is best achieved by using the HCPL-x710 optocouplers. For each network, the HCPL- x710 satisify the critical propagation delay and pulse width distortion requirements over the temperature range of 0°C to +85°C, and power supply voltage range of 4 ...
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... POWER NETWORK POWER SUPPLY Figure 18. Typical DeviceNet node. Implementing DeviceNet and SDS with the HCPL-x710 HCPL-0710 fig 17 With transmission rates Mbit/s, both DeviceNet and SDS are based upon the same broadcast-oriented, communications protocol — the Controller Area Network (CAN). Three types of isolated nodes are rec- ...
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... HCPL-x710 ensure the network will not “lock-up” if either AC line power to the node is lost or the node powered-off. Specifically, when input power (V the HCPL-x710 located in the transmit path is eliminat- ed, a RECESSIVE bus state is ensured as the HCPL-x710 output voltage ( HIGH. O NODE/APP SPECIFIC ...
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... HCPL-x710 ensure the network will not “lock-up” if either AC line power to the node is lost or the node powered-off. Specifically, when input power (V the HCPL-x710 located in the transmit path is eliminat- ed, a RECESSIVE bus state is ensured as the HCPL-x710 output voltage (V AC LINE 5 V REG. ...
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... Power Supplies and Bypassing The recommended DeviceNet application circuit is shown in Figure 22. Since the HCPL-x710 are fully com- patible with CMOS logic level signals, the optocoupler is connected directly to the CAN transceiver. Two bypass capacitors (with values between 0.01 and 0.1 µF) are ...
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... Power Supplies and Bypassing The recommended PROFIBUS application circuit is shown in Figure 24. Since the HCPL-x710 are fully com- patible with CMOS logic level signals, the ler is connected directly to the transceiver. Two bypass capacitors (with values between 0.01 and 0.1 µF) are required and should be located as close as possible to the input and output power-supply pins of the HCPL- x710 ...
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