ACPL-074L-060E Avago Technologies US Inc., ACPL-074L-060E Datasheet - Page 8

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ACPL-074L-060E

Manufacturer Part Number
ACPL-074L-060E
Description
OPTOCOUPLER DUAL 15MBD 8-SOIC
Manufacturer
Avago Technologies US Inc.
Datasheet

Specifications of ACPL-074L-060E

Package / Case
8-SOIC (0.154", 3.90mm Width)
Voltage - Isolation
3750Vrms
Number Of Channels
2, Unidirectional
Current - Output / Channel
10mA
Data Rate
15MBd
Propagation Delay High - Low @ If
29ns @ 14mA
Current - Dc Forward (if)
20mA
Input Type
DC
Output Type
Push-Pull, Totem-Pole
Mounting Type
Surface Mount
Isolation Voltage
3750 Vrms
Maximum Continuous Output Current
10 mA
Maximum Fall Time
25 ns
Maximum Forward Diode Current
20 mA
Maximum Rise Time
20 ns
Minimum Forward Diode Voltage
1.3 V
Output Device
Logic Gate Photo IC
Configuration
2 Channel
Maximum Baud Rate
15 MBps
Maximum Forward Diode Voltage
1.8 V
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Package Characteristics
All Typical at T
Notes:
1. Slew rate of supply voltage ramping is recommended to ensure no glitch more than 1V to appear at the output pin.
2. t
3. PWD is defined as |t
4. t
5. CM
6. CM
Figure 1. Typical input diode forward characteristic.
Figure 3. Typical logic high O/P supply current vs. temperature for ACPL-074L.
8
Parameter
Input-Output Insulation
Input-Output Momentary
Withstand Voltage
Input-Output Resistance
Input-Output Capacitance
t
recommended operating conditions.
PHL
PLH
PSK
12
10
0.001
1000
8
6
4
2
0
0.01
H
L
100
is equal to the magnitude of the worst case difference in t
-40
propagation delay is measured from the 50% level on the falling edge of the input pulse to the 50% level of the rising edge of the V
0.1
propagation delay is measured from the 50% level on the rising edge of the input pulse to the 50% level of the falling edge of the V
is the maximum tolerable rate of fall of the common mode voltage to assure that the output will remain in a low logic state.
is the maximum tolerable rate of rise of the common mode voltage to assure that the output will remain in a high logic state.
10
1
1.1
-20
A
V F
= 25
I F
1.2
PHL
0
°
C.
T
- t
A
PLH
V
-TEMPERATURE-
F
20
|.
-FORWARD VOLTAGE-V
1.3
40
Symbol
I
V
R
C
I-O
ISO
I-O
I-O
T
1.4
o
A
C
=25°C
60
V
V
DD
DD
=5.0V
=3.3V
80
1.5
Min.
3750
100
PHL
1.6
and/or t
Typ.
10
0.6
12
Figure 2. Typical input threshold current vs. temperature.
Figure 4. Typical logic low O/P supply current vs. temperature for ACPL-074L.
PLH
that will be seen between units at any given temperature within the
12
10
6
5
4
3
2
1
0
8
6
4
2
0
-40
-40
Max.
1.0
-20
-20
0
Units
μA
Vrms
:
pF
0
T
A
T
-TEMPERATURE-
20
A
20
-TEMPERATURE-
40
Test Conditions
45% RH, t = 5 s
V
T
RH ≤ 50%, t = 1 min.,
T
V
f = 1 MHz, T
40
A
A
I-O
I-O
= 25°C
= 25°C
= 3 kV DC,
= 500 V dc
60
o
C
o
I
60
C
oL
V
V
DD
DD
=20uA
A
80
=5.0V
=3.3V
= 25°C
80
5V
3.3V
100
O
100
O
signal.
signal.
120

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