DS1982-F3+ Maxim Integrated Products, DS1982-F3+ Datasheet - Page 15

• Manufacturer Part Number: DS1982-F3+
• Description: IBUTTON 1KBit ADD-ONLY F3
• Manufacturer: Maxim Integrated Products
• Series: iButton®r

Specifications of DS1982-F3+

• Rohs Information: IButton RoHS Compliance Plan
• Memory Size: 128B
• Memory Type: EPROM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DS1982
A multidrop bus consists of a 1-Wire bus with multiple slaves attached. The 1-Wire bus has a maximum
data rate of 16.3kbps. If the bus master is also required to perform programming of the EPROM portions
of the DS1982, a programming supply capable of delivering up to 10 milliamps at 12 volts for 480 s is
required. The idle state for the 1-Wire bus is high. If, for any reason, a transaction needs to be suspended,
the bus MUST be left in the idle state if the transaction is to resume. If this does not occur and the bus is
left low for more than 120 s, one or more of the devices on the bus may be reset.
TRANSACTION SEQUENCE
The sequence for accessing the DS1982 via the 1-Wire port is as follows:
 Initialization
 ROM Function Command
 Memory Function Command
 Read/Write Memory/Status
INITIALIZATION
All transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequence
consists of a Reset Pulse transmitted by the bus master followed by a presence pulse(s) transmitted by the
slave(s).
The presence pulse lets the bus master know that the DS1982 is on the bus and is ready to operate. For
more details, see the “1-Wire Signaling” section.
ROM FUNCTION COMMANDS
Once the bus master has detected a presence, it can issue one of the four ROM function commands. All
ROM function commands are 8 bits long. A list of these commands follows (refer to flowchart in Figure
9):
Read ROM [33h]
This command allows the bus master to read the DS1982’s 8-bit family code, unique 48-bit serial
number, and 8-bit CRC. This command can be used only if there is a single DS1982 on the bus. If more
than one slave is present on the bus, a data collision will occur when all slaves try to transmit at the same
time (open drain will produce a wired-AND result).
Match ROM [55h]
The match ROM command, followed by a 64–bit ROM sequence, allows the bus master to address a
specific DS1982 on a multidrop bus. Only the DS1982 that exactly matches the 64-bit ROM sequence
will respond to the subsequent memory function command. All slaves that do not match the 64-bit ROM
sequence will wait for a Reset Pulse. This command can be used with a single or multiple devices on the
bus.
Page 15 of 24