SMS512DFA5E NUMONYX, SMS512DFA5E Datasheet - Page 14

• Manufacturer Part Number: SMS512DFA5E
• Description: MICROSD CARD SMS 512MB FLASH MEM
• Manufacturer: NUMONYX

Specifications of SMS512DFA5E

• Memory Size: 512MB
• Memory Type: SD (Secure Digital)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Secure digital memory card interface
3.2
14/60
Figure 4.
1. DAT1 and DAT2 not connected.
SD bus protocol
Communication over the SD bus is based on command and data bit streams which are
initiated by a start bit and terminated by a stop bit.
Card addressing is implemented using a session address assigned to the card during the
initialization phase (see
transaction on the SD bus is the command/response transaction. In this type of bus
transactions, the information is directly transferred within the command or response
structure. In addition, some operations have a data token. Data transfers to/from the SD
memory card are done in blocks. Data blocks are always followed by CRC bits.
Single and multiple block operations are supported. Note that the multiple block operation
mode improves the speed of write operations. A multiple block transmission is terminated by
issuing a STOP_TRANSMISSION command on the CMD line (see
read operation
Command: a command is a token which starts an operation. A command is sent from
the host either to a single card (addressed command) or to all connected cards
(broadcast command). Commands are transferred serially on the CMD line. See
Figure 5: ‘No response’ and ‘no data’
The command token format is shown in
Response: a response is a token which is sent from an addressed card, or
(simultaneously) from all connected cards, to the host, as an answer to a previously
received command. Responses are transferred serially on the CMD line. A response is
illustrated in
The response token format is shown in
Data: data can be transferred from the card to the host or from the host to the card.
Data is transferred via the data lines. See
an illustration.
The data packet format is shown in
Secure digital memory card system bus topology
and
DAT0-DAT3(B)
CMD(B)
DAT0-DAT3(C)
CMD(C)
Figure 5: ‘No response’ and ‘no data’
DAT0-DAT3(A)
CMD(A)
Figure 7: (Multiple) block write
HOST
Section 4: SD memory card hardware
CLK
V
V
DD
SS
Figure
operations.
DAT0-DAT3 CMD
DAT0-DAT3 CMD
Figure
Figure
DAT0, CS, CMD
Figure 6: (Multiple) block read operation
10.
CLK
CLK
CLK
V
V
V
V
V
V
operation).
DD
DD
DD
SS
SS
SS
9.
8.
MultiMediaCard
operations.
SD memory
SD memory
(1)
card (A)
card (B)
(C)
interface). The basic
Figure 6: (Multiple) block
SMSxxxDF
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for