DS1961S-F3 Maxim Integrated Products, DS1961S-F3 Datasheet - Page 3

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DS1961S-F3

Manufacturer Part Number
DS1961S-F3
Description
IBUTTON EEPROM 1KBit SHA-1 2CAN
Manufacturer
Maxim Integrated Products
Series
iButton®r
Datasheet

Specifications of DS1961S-F3

Rohs Information
IButton RoHS Compliance Plan
Memory Size
128B
Memory Type
EEPROM
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
SHA-1 (Secure Hash Algorithm) engine. The hierarchical structure of the 1-Wire protocol is shown in
Figure 2. The bus master must first provide one of the seven ROM function commands, 1) Read ROM, 2)
Match ROM, 3) Search ROM, 4) Skip ROM, 5) Resume Communication, 6) Overdrive-Skip ROM, or 7)
Overdrive-Match ROM. Upon completion of an overdrive ROM command byte executed at standard
speed, the device enters overdrive mode where all subsequent communication occurs at a higher speed.
The protocol required for these ROM function commands is described in Figure 9. After a ROM function
command is successfully executed, the memory functions become accessible and the master can provide
any one of the eight memory and SHA function commands. The protocol for these memory and SHA
function commands is described in Figure 7. All data is read and written LSB first.
Figure 1. DS1961S BLOCK DIAGRAM
64-BIT LASERED ROM
Each DS1961S contains a unique ROM code that is 64 bits long. The first eight bits are a 1-Wire family
code. The next 48 bits are a unique serial number. The last eight bits are a CRC of the first 56 bits (see
Figure 3). The 1-Wire CRC is generated using a polynomial generator consisting of a shift register and
XOR gates as shown in Figure 4. The polynomial is X
Dallas 1-Wire CRC is available in The Book of DS19xx iButton Standards from Dallas Semiconductor.
The shift register bits are initialized to zero. Then starting with the LSB of the family code, one bit at a
time is shifted in. After the 8th bit of the family code has been entered, then the serial number is entered.
After the 48th bit of the serial number has been entered, the shift register contains the CRC value.
Shifting in the eight bits of CRC should return the shift register to all zeros.
1-Wire Net
Register Page
SHA Function
Data Memory
256 bits Each
Memory and
Control Unit
4 Pages of
Generator
CRC16
64-bit
Function Control
1-Wire
3 of 36
8
+ X
Parasite Power
5
+ X
4
+ 1. Additional information about the
Secrets Memory
Lasered ROM
Secure Hash
Scratchpad
Algorithm
512-bit
Engine
64-bit
64-bit
64-bit

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