SDCFJ-1024-388 SanDisk, SDCFJ-1024-388 Datasheet - Page 23

COMPACT FLASH 1GB

SDCFJ-1024-388

Manufacturer Part Number
SDCFJ-1024-388
Description
COMPACT FLASH 1GB
Manufacturer
SanDisk
Type
CompactFlashr
Datasheets

Specifications of SDCFJ-1024-388

Memory Size
1GB
Memory Type
CompactFLASH
Density
1GByte
Operating Supply Voltage (typ)
3.3/5V
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Package Type
Not Required
Mounting
Socket
Pin Count
50
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
3.135/4.5V
Operating Supply Voltage (max)
3.465/5.5V
Programmable
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
CompactFlash Memory Card Interface Description
3-4
-CE1, -CE2
(PC Card Memory Mode)
Card Enable
-CE1, -CE2
(PC Card I/O Mode)
Card Enable
-CS0, -CS1
(True IDE Mode)
-CSEL
(PC Card Memory Mode)
-CSEL
(PC Card I/O Mode)
-CSEL
(True IDE Mode)
D15—D00
(PC Card Memory Mode)
D15—D00
(PC Card I/O Mode)
D15—D00
(True IDE Mode)
GND
(PC Card Memory Mode)
GND
(PC Card I/O Mode)
GND
(True IDE Mode)
-INPACK
( PC Card Memory Mode)
-INPACK
( PC Card I/O Mode)
Input Acknowledge
-DMARQ
(True IDE Mode)
-IORD
(PC Card Memory Mode)
-IORD
(PC Card I/O Mode)
-IORD
(True IDE Mode)
Signal Name
Dir.
I/O
O
--
I
I
I
31, 30, 29, 28,
27, 49, 48, 47,
6, 5, 4, 3, 2, 23,
22, 21
7, 32
1, 50
Pin
39
43
34
CompactFlash
These input signals are used both to select the card and to indicate to the card
whether a byte or a word operation is being performed. -CE2 always accesses the
odd byte of the word. -CE1 accesses the even byte or the Odd byte of the word
depending on A0 and -CE2. A multiplexing scheme based on A0, -CE1, -CE2 allows 8
bit hosts to access all data on D0-D7. See Tables 3-11, 3-12, 3-15, and 3-16.
This signal is the same as the PC Card Memory Mode signal.
In the True IDE Mode -CS0 is the chip select for the task file registers while -CS1 is
used to select the Alternate Status Register and the Device Control Register.
This signal is not used for this mode.
This signal is not used for this mode.
This internally pulled up signal is used to configure this device as a Master or a Slave
when configured in the True IDE Mode. When this pin is grounded, this device is
configured as a Master. When the pin is open, this device is configured as a Slave.
These lines carry the Data, Commands and Status information between the host and
the controller. D00 is the LSB of the Even Byte of the Word. D08 is the LSB of the
Odd Byte of the Word.
These signals are the same as the PC Card Memory Mode signal.
In True IDE Mode all Task File operations occur in byte mode on the low order bus
D00-D07 while all data transfers are 16 bits using D00-D15.
Ground.
This signal is the same for all modes.
This signal is the same for all modes.
This signal is not used in this mode.
The Input Acknowledge signal is asserted by the CompactFlash Card when the card is
selected and responding to an I/O read cycle at the address that is on the address
bus. This signal is used by the host to control the enable of any input data buffers
between the card and the CPU.
This signal is used for DMA data transfers between host and device and is asserted
by the device when it is ready to transfer data to or from the host. The direction of data
transfer is controlled by DIOR- and DIOW-. This signal is used in a handshake
manner with DMACK- (i.e., the device waits until the host asserts DMACK- before
negating DMARQ, and reasserting DMARQ if there is more data to transfer).
This signal is not used in this mode.
This is an I/O Read strobe generated by the host. This signal gates I/O data onto the
bus from the CompactFlash Card when the card is configured to use the I/O interface.
In True IDE Mode, this signal has the same function as in PC Card I/O Mode.
®
Memory Card Product Manual, Rev. 11.0 ©2006 SanDisk Corporation
Description

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