MT16VDDT12864AY-335F2 Micron Technology Inc, MT16VDDT12864AY-335F2 Datasheet - Page 33
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MT16VDDT12864AY-335F2
Manufacturer Part Number
MT16VDDT12864AY-335F2
Description
MODULE DDR 1GB 184-DIMM
Manufacturer
Micron Technology Inc
Specifications of MT16VDDT12864AY-335F2
Memory Type
DDR SDRAM
Memory Size
1GB
Speed
333MT/s
Package / Case
184-DIMM
Main Category
DRAM Module
Sub-category
DDR SDRAM
Module Type
184UDIMM
Device Core Size
64b
Organization
128Mx64
Total Density
1GByte
Chip Density
512Mb
Maximum Clock Rate
333MHz
Operating Supply Voltage (typ)
2.5V
Operating Current
1.44A
Number Of Elements
16
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Pin Count
184
Mounting
Socket
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 23: Serial Presence-Detect Matrix (2GB) (Continued)
“1”/“0”: Serial Data, “driven to HIGH”/“driven to LOW”; notes appear on page 31
NOTE:
pdf: 09005aef80739fa5, source: 09005aef807397e5
DD16C32_64_128_256x64AG.fm - Rev. C 9/04 EN
1. Value for -26A
2. The value of
3. The JEDEC SPD specification allows fast or slow slew rate values for these bytes. The worst-case (slow slew rate) value is
4. The value of
99-127 Manufacturer-specific Data (RSVD)
BYTE
36-40
46-61
46-61
65-71
73-90
95-98
represented here. Systems requiring the fast slew rate setup and hold values are supported, provided the faster mini-
mum slew rate is met.
SDRAM device specification is 15ns.
33
34
35
41
42
43
44
45
47
62
63
64
72
91
92
93
94
Address and Command Hold Time,
Data/Data Mask Input Setup Time,
Data/Data Mask Input Hold Time,
Reserved
Min Active Auto Refresh Time
Minimum Auto Refresh to Active/ Auto Refresh
Command Period,
SDRAM Device Max Cycle Time
SDRAM Device Max DQS-DQ Skew Time
SDRAM Device Max Read Data Hold Skew Factor
t
Reserved
DIMM Height
Reserved
SPD Revision
Checksum For Bytes 0-62
Manufacturer’s JEDEC ID Code
Manufacturer’s JEDEC ID Code
Manufacturing Location
Module Part Number (ASCII)
PCB Identification Code
Identification Code (Continued)
Year of Manufacture in BCD
Week of Manufacture in BCD
Module Serial Number
QHS
t
t
RAS used for -26A/-265 modules is calculated from
RP,
t
CK set to 7ns (0x70) for optimum BIOS compatibility. Actual device spec. value is 7.5ns.
t
RCD and
t
t
RFC
DESCRIPTION
RAP for -335 modules indicated as 18ns to align with industry specifications; actual DDR
t
RC
t
CK
t
DH
MAX
t
t
DS
IH, (See note 2)
t
DQSQ
33
256MB, 512MB, 1GB, 2GB (x64, DR)
t
RC -
120ns (all speed grades)
1.0ns (-262/-26A/-265)
0.5ns (-262/-26A/-265)
0.5ns (-262/-26A/-265)
0.5ns (-262/-26A/-265)
0.75ns (-262/-26A/-265)
13ns (-262/-26A/-265)
Standard/Low-Profile
Micron Technology, Inc., reserves the right to change products or specifications without notice.
ENTRY (VERSION)
184-PIN DDR SDRAM UDIMM
65ns (-26A/-265)
t
60ns (-335/-262)
RP. Actual device spec. value is 40 ns.
0.45ns (-335)
0.45ns (-335)
0.45ns (-335)
0.55ns (-335)
(Continued)
0.8ns (-335)
12ns (-335)
Release 1.0
MICRON
01–12
-26A
-335
-262
-265
0
MT16VDDT25664A
Variable Data
Variable Data
Variable Data
Variable Data
Variable Data
©2004 Micron Technology, Inc.
AB/BB
D8/E8
01–0C
1B/2B
1C/2C
01/11
A0
2D
3C
2C
80
45
50
45
50
00
41
78
30
34
32
55
75
00
00
10
FF
00
–