MT8VDDT6464HG-335D1 Micron Technology Inc, MT8VDDT6464HG-335D1 Datasheet - Page 16

• Manufacturer Part Number: MT8VDDT6464HG-335D1
• Description: MODULE DDR SDRAM 512MB 200SODIMM
• Manufacturer: Micron Technology Inc

Specifications of MT8VDDT6464HG-335D1

• Memory Type: DDR SDRAM
• Memory Size: 512MB
• Speed: 167MHz
• Package / Case: 200-SODIMM
• Main Category: DRAM Module
• Sub-category: DDR SDRAM
• Module Type: 200SODIMM
• Device Core Size: 64b
• Organization: 64Mx64
• Total Density: 512MByte
• Chip Density: 512Mb
• Maximum Clock Rate: 333MHz
• Operating Supply Voltage (typ): 2.5V
• Operating Current: 1.4A
• Number Of Elements: 8
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Pin Count: 200
• Mounting: Socket
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 557-1127

Table 15: Capacitance
Note: 11; notes appearon pages 18–21
Table 16:
DDR SDRAM Components only
Notes: 1–5, 12-15, 29; notes appear on pages 18–21; 0°C
pdf: 09005aef8092973f, source: 09005aef80921669
DD8C16_32_64x64HG.fm - Rev. B 9/04 EN
AC CHARACTERISTICS
PARAMETER
Access window of DQs from CK/CK#
CK high-level width
CK low-level width
Clock cycle time
DQ and DM input hold time relative to DQS
DQ and DM input setup time relative to DQS
DQ and DM input pulse width (for each
input)
Access window of DQS from CK/CK#
DQS input high pulse width
DQS input low pulse width
DQS-DQ skew, DQS to last DQ valid, per
group, per access
Write command to first DQS latching
transition
DQS falling edge to CK rising - setup time
DQS falling edge from CK rising - hold time
Half clock period
Data-out high-impedance window from CK/
CK#
Data-out low-impedance window from CK/
CK#
Address and control input hold time (fast
slew rate)
Address and control input setup time (fast
slew rate)
Address and control input hold time (slow
slew rate)
Address and control input setup time (slow
slew rate)
Address and Control input pulse width (for
each input)
LOAD MODE REGISTER command cycle time
PARAMETER
Input/Output Capacitance: DQ, DQS, DM
Input Capacitance: Command and Address, S#, CKE
Input Capacitance: CK, CK#
Electrical Characteristics and Recommended AC Operating Conditions
CL = 2.5
CL = 2
SYMBOL
t
t
CK (2.5)
t
DQSCK
t
t
t
t
t
CK (2)
DQSQ
t
DQSH
DIPW
DQSL
DQSS
t
t
t
MRD
t
t
t
DSH
t
t
t
t
t
t
IPW
DSS
t
t
t
DH
AC
CH
DS
HP
HZ
IH
IH
CL
IS
IS
LZ
F
S
F
S
T
-0.60
-0.70
MIN
0.45
0.45
0.45
0.45
1.75
0.35
0.35
0.75
0.75
0.75
0.80
0.80
-0.7
A
7.5
0.2
0.2
2.2
12
6
16
t
CH,
+70°C; V
-335
128MB, 256MB, 512MB (x64, SR)
t
MAX
+0.75
+0.60
CL
+0.70
0.55
0.55
0.45
1.25
13
13
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DD
SYMBOL
= V
C
C
C
-0.75
-0.75
-0.75
MIN
0.45
0.45
1.75
0.35
0.35
0.75
0.90
0.90
IO
I1
I2
7.5
7.5
0.5
0.5
0.2
0.2
2.2
15
1
1
DD
t
CH,
-262
Q = +2.5V ±0.2V
200-PIN DDR SODIMM
t
+0.75
+0.75
CL
+0.75
MAX
0.55
0.55
1.25
0.5
13
13
7.5/10
-0.75
-0.75
-0.75
MIN
0.45
0.45
1.75
0.35
0.35
0.75
0.90
0.90
7.5
0.5
0.5
0.2
0.2
2.2
15
-26A/-265
1
1
MIN
t
©2004 Micron Technology, Inc. All rights reserved.
CH,
16
4
8
t
CL
MAX
+0.75
+0.75
+0.75
0.55
0.55
1.25
0.5
13
13
MAX
24
12
5
UNITS NOTES
t
t
t
t
t
t
t
ns
CK
CK
ns
ns
ns
ns
ns
ns
CK
CK
ns
CK
CK
CK
ns
ns
ns
ns
ns
ns
ns
ns
ns
UNITS
pF
pF
pF
40, 45
40, 45
23, 27
23, 27
22, 23
16, 37
16, 37
26
26
27
30
12
12
12
12