MT18VDVF12872DG-40BD4 Micron Technology Inc, MT18VDVF12872DG-40BD4 Datasheet - Page 19
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MT18VDVF12872DG-40BD4
Manufacturer Part Number
MT18VDVF12872DG-40BD4
Description
MODULE DDR 1GB 184-DIMM VLP
Manufacturer
Micron Technology Inc
Datasheet
1.MT18VDVF12872DG-40BD4.pdf
(38 pages)
Specifications of MT18VDVF12872DG-40BD4
Memory Type
DDR SDRAM
Memory Size
1GB
Speed
400MT/s
Package / Case
184-DIMM
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Table 12:
PDF: 09005aef81c73825/Source: 09005aef81c73837
DVF18C64_128x72D_2.fm - Rev. A 8/05 EN
Parameter/Condition
OPERATING CURRENT: One device bank; Active-Precharge;
t
per clock cyle; Address and control inputs changing once every
two clock cycles
OPERATING CURRENT: One device bank; Active -Read Precharge;
Burst = 4;
and control inputs changing once per clock cycle
PRECHARGE POWER-DOWN STANDBY CURRENT: All device banks
idle; Power-down mode;
IDLE STANDBY CURRENT: CS# = HIGH; All device banks idle;
t
once per clock cycle. V
ACTIVE POWER-DOWN STANDBY CURRENT: One device bank
active; Power-down mode;
ACTIVE STANDBY CURRENT: CS# = HIGH; CKE = HIGH; One device
bank; Active-Precharge;
DM andDQS inputs changing twice per clock cycle; Address and
other control inputs changing once per clock cycle
OPERATING CURRENT: Burst = 2; Reads; Continuous burst; One
bank active; Address and control inputs changing once per clock
cycle;
OPERATING CURRENT: Burst = 2; Writes; Continuous burst; One
device bank active; Address and control inputs changing once per
clock cycle;
twice per clock cycle
AUTO REFRESH CURRENT
SELF REFRESH CURRENT: CKE ≤ 0.2V
OPERATING CURRENT: Four device bank interleaving READs (BL =
4) with auto precharge,
and control inputs change only during Active READ, or WRITE
commands
RC (MIN);
CK MIN; CKE = HIGH; Address and other control inputs changing
t
CK =
t
t
RC =
CK =
t
t
CK =
CK (MIN); I
I
DDR SDRAM Components Only
Notes: 1–5, 8, 10, 12, 47; notes appear on pages 22–26; 0°C ≤ T
DD
t
t
RC (MIN);
CK (MIN); DQ, DM and DQS inputs changing once
t
Specifications and Conditions – 1GB
CK (MIN); DQ, DM, and DQS inputs changing
IN
Note:
OUT
t
t
= V
RC =
RC =
t
CK =
t
CK =
t
= 0mA
REF
CK =
t
t
RC (MIN);
RAS (MAX);
t
for DQ, DQS, and DM
CK (MIN); CKE = (LOW)
t
ranks in I
b: Value calculated reflects all module ranks in this operating condition.
CK (MIN); I
a: Value calculated as one module rank in this operating condition, and all other module
t
CK (MIN); CKE = LOW
t
CK =
DD
t
CK =
OUT
2p (CKE LOW) mode.
t
CK (MIN); Address
t
t
= 0mA; Address
REFC =
REFC = 7.8125µs
t
CK (MIN); DQ,
512MB, 1GB: (x72, DR) 184-Pin DDR VLP RDIMM
t
RFC (MIN)
t
RC =
19
t
CK =
I
I
I
I
I
I
I
DD4W
I
I
I
Sym
DD3N
DD4R
I
DD5A
I
DD2P
DD2F
DD3P
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DD 0 a
DD1
DD5
DD6
DD7
a
b
b
a
b
b
b
a
b
b
a
A
≤ +70°C; V
1,215
1,485
1,530
1,620
5,220
3,690
-335
810
630
900
180
90
90
DD
©2003, 2004, 2005 Micron Technology, Inc. All rights reserved.
1,215
1,485
1,530
1,440
5,220
3,645
Max
-262
Electrical Specifications
810
630
900
180
90
90
= V
DD
Q = +2.5V ±0.2V
-26A/
1,080
1,350
1,350
1,260
5,040
3,195
-265
720
540
810
180
90
90
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
21, 28,
21, 28,
Notes
20, 41
20, 41
20, 41
20, 43
24, 43
20, 42
43
44
43
20
9