MT16VDDF6464HY-335G2 Micron Technology Inc, MT16VDDF6464HY-335G2 Datasheet - Page 10

• Manufacturer Part Number: MT16VDDF6464HY-335G2
• Description: MODULE SDRAM DDR 512MB 200SODIMM
• Manufacturer: Micron Technology Inc

Specifications of MT16VDDF6464HY-335G2

• Memory Type: DDR SDRAM
• Memory Size: 512MB
• Speed: 333MT/s
• Package / Case: 200-SODIMM
• Main Category: DRAM Module
• Sub-category: DDR SDRAM
• Module Type: 200SODIMM
• Device Core Size: 64b
• Organization: 64Mx64
• Total Density: 512MByte
• Chip Density: 256Mb
• Maximum Clock Rate: 333MHz
• Operating Supply Voltage (typ): 2.5V
• Operating Current: 1.432A
• Number Of Elements: 16
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Pin Count: 200
• Mounting: Socket
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

I
Table 9:
PDF: 09005aef80a77a90/Source: 09005aef80a646bc
DDF16C64_128x64_L_H.fm - Rev. G 8/08 EN
Parameter/Condition
Operating one bank active-precharge current: One device
bank; Active-precharge;
and DQS inputs changing once per clock cycle; Address and control
inputs changing once every two clock cycles
Operating one bank active-read-precharge current: One device
bank; Active-read-precharge; BL = 4;
t
once per clock cycle
Precharge power-down standby current: All device banks idle;
Power-down mode;
Idle standby current: CS# = HIGH; All device banks are idle;
t
changing once per clock cycle. V
Active power-down standby current: One device bank active;
Power-down mode;
Active standby current: CS# = HIGH; CKE = HIGH; One device
bank active;
inputs changing twice per clock cycle; Address and other control
inputs changing once per clock cycle
Operating burst read current: BL = 2; Continuous burst reads;
One device bank active; Address and control inputs changing once
per clock cycle;
Operating burst write current: BL = 2; Continuous burst writes;
One device bank active; Address and control inputs changing once
per clock cycle;
twice per clock cycle
Auto refresh burst current
Self refresh current: CKE ≤ 0.2V
Operating bank interleave read current: Four device bank
interleaving reads (BL = 4) with auto precharge;
t
inputs change only during active READ or WRITE commands
DD
CK =
CK =
RC = (MIN)
Specifications
t
t
CK (MIN); I
CK (MIN); CKE = HIGH; Address and other control inputs
t
t
RC allowed;
RC =
I
Values are shown for the MT46V32M8 DDR SDRAM only and are computed from values specified in the
256Mb (32 Meg x 8) component data sheet
DD
t
t
CK =
CK =
OUT
Specifications and Conditions – 512MB (Die Revison K)
t
Notes:
RAS (MAX);
t
t
CK =
CK =
= 0mA; Address and control inputs changing
t
t
CK (MIN); I
CK (MIN); DQ, DM, and DQS inputs changing
t
RC =
t
CK =
t
t
CK (MIN); CKE = (LOW)
CK (MIN); CKE = LOW
1. Value calculated as one module rank in this operating condition; all other module ranks are
2. Value calculated reflects all module ranks in this operating condition.
3. The standard module guarantees I
t
RC (MIN);
t
in I
t
CK (MIN); Address and control
CK =
IN
OUT
DD
= V
2P (CKE LOW) mode.
= 0mA
t
t
RC =
REF
CK (MIN); DQ, DM, and DQS
t
for DQ, DQS, and DM
CK =
t
RC (MIN);
t
t
Standard
Low power
t
REFC =
REFC = 7.8125µs
CK (MIN); DQ, DM,
t
RFC (MIN)
10
512MB, 1GB (x64, DR) 200-Pin DDR SODIMM
DD
6 and the low-power module guarantees I
Micron Technology, Inc., reserves the right to change products or specifications without notice.
I
Symbol
I
DD
I
I
I
I
I
I
I
DD
DD
DD
DD
I
I
DD
DD
DD
I
I
DD
DD
DD
DD
DD
6A
4W
6
3N
5A
2P
2F
3P
4R
0
1
5
7
2, 3
2, 3
1
1
2
1
2
2
2
1
2
2
1
1,472
1,472
2,560
2,352
-40B
832
992
800
560
960
64
96
64
32
Electrical Specifications
©2003 Micron Technology, Inc. All rights reserved
1,132
1,312
2,560
2,192
-335
752
952
800
480
880
64
96
64
32
DD
6A.
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA