MT4VDDT864AG-26AB1 Micron Technology Inc, MT4VDDT864AG-26AB1 Datasheet - Page 10
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MT4VDDT864AG-26AB1
Manufacturer Part Number
MT4VDDT864AG-26AB1
Description
MODULE SDRAM DDR 64MB 184DIMM
Manufacturer
Micron Technology Inc
Datasheet
1.MT4VDDT864AG-265B1.pdf
(28 pages)
Specifications of MT4VDDT864AG-26AB1
Memory Type
DDR SDRAM
Memory Size
64MB
Speed
266MT/s
Package / Case
184-DIMM
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
TER command to the mode register (with BA0 = 1 and
BA1 = 0) and will retain the stored information until it
is programmed again or the device loses power. The
enabling of the DLL should always be followed by a
LOAD MODE REGISTER command to the mode regis-
ter (BA0/BA1 both low) to reset the DLL.
all device banks are idle and no bursts are in progress,
and the controller must wait the specified time before
initiating any subsequent operation. Violating either
of these requirements could result in unspecified oper-
ation.
Output Drive Strength
specified to be SSTL2, Class II. The x16 supports an
option for reduced drive. This option is intended for
the support of the lighter load and/or point-to-point
environments.
strength will alter the DQs and DQSs from SSTL2,
Class II drive strength to a reduced drive strength,
which is approximately 54 percent of the SSTL2, Class
II drive strength.
reduced drive strength option, refer to the 128Mb,
256Mb, or 512Mb DDR SDRAM component data
sheets.
DLL Enable/Disable
DLL enable is required during power-up initialization
and upon returning to normal operation after having
disabled the DLL for the purpose of debug or evalua-
tion. (When the device exits self refresh mode, the DLL
is enabled automatically.)
enabled, 200 clock cycles must occur before a READ
command can be issued.
pdf: 09005aef8085081a, source: 09005aef806e129d
DD4C8_16_32x64AG.fm - Rev. B 9/04 EN
The extended mode register must be loaded when
The normal full drive strength for all outputs is
For detailed information on programmable and
The DLL must be enabled for normal operation.
The selection of the reduced drive
Any time the DLL is
10
NOTE:
1. BA1 and BA0 (E13 and E12 for 64MB, E14 and E13 for
2. The QFC# option is not supported.
128MB, 256MB Modules
64MB Module
E11
0 1
14
BA1 BA0
0
–
64MB, 128MB, 256MB (x64, SR)
128MB or 256MB) must be “0, 1” to select the Extended
Mode Register (vs. the base Mode Register).
Figure 5: Extended Mode Register
E10
1 1
13
0
–
0 1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
BA1 BA0
13
184-PIN DDR SDRAM UDIMM
E9
12
A12
0
–
1 1
12
E8
11
0
–
A11
11
A11
E7
10
0
–
A10
10
Definition Diagram
A10
E6 E5
0
–
Operating Mode
9
A9
9
A9
0
–
Operating Mode
8
A8
8
E4
A8
0
–
7
A7 A6 A5 A4 A3
7
E3
A7 A6 A5 A4 A3
0
–
6
E2
6
0
–
5
2
5
4
E1,
4
Valid
3
–
E0
3
2
A2 A1 A0
2
A2 A1 A0
DS
Operating Mode
Normal Operation
All other states reserved
1
DS
E1
1
0
1
DLL
©2004 Micron Technology, Inc.
0
DLL
E0
0
1
0
Extended Mode
Register (Ex)
Drive Strength
Address Bus
Extended Mode
Register (Ex)
Address Bus
Reduced
Disable
Normal
Enable
DLL