MT9HTF3272Y-53EB2 Micron Technology Inc, MT9HTF3272Y-53EB2 Datasheet - Page 13

MODULE DDR2 256MB 240DIMM

MT9HTF3272Y-53EB2

Manufacturer Part Number
MT9HTF3272Y-53EB2
Description
MODULE DDR2 256MB 240DIMM
Manufacturer
Micron Technology Inc

Specifications of MT9HTF3272Y-53EB2

Memory Type
DDR2 SDRAM
Memory Size
256MB
Speed
533MT/s
Package / Case
240-DIMM
Main Category
DRAM Module
Sub-category
DDR2 SDRAM
Module Type
240RDIMM
Device Core Size
72b
Organization
32Mx72
Total Density
256MByte
Chip Density
256Mb
Access Time (max)
500ps
Maximum Clock Rate
533MHz
Operating Supply Voltage (typ)
1.8V
Operating Current
1.44A
Number Of Elements
9
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Operating Temp Range
0C to 55C
Operating Temperature Classification
Commercial
Pin Count
244
Mounting
Socket
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PLL
Table 14:
Table 15:
PDF: 09005aef817ab1fc/Source: 09005aef817ab1dd
HTF9C32_64_128x72K.fm - Rev. C 9/06 EN
Parameter
DC high-level input voltage
DC low-level input voltage
Input voltage (limits)
DC high-level input voltage
DC low-level input voltage
Input differential-pair cross
voltage
Input differential voltage
Input differential voltage
Input current
Output disabled current
Static supply current
Dynamic supply
Input capacitance
Stabilization time
Input clock slew rate
SSC modulation frequency
SSC clock input frequency deviation
PLL loop bandwidth (-3dB from unity gain)
Parameter
PLL (CU877 device or Equivilent JESD82-8.01)
PLL Clock Driver Timing Requirements and Switching Characteristics
Note: 1
Notes:
1. PLL timing and switching specifications are critical for proper operation of the DDR2 DIMM.
2. The output slew rate is determined from the IBIS model:
256MB, 512MB, 1GB: (x72, SR) 244-Pin DDR2 Registered MiniDIMM
Symbol
V
V
This is a subset of parameters for the specific PLL used. Detailed PLL information is available
in JEDEC Standard JESD82.
I
ID
ID
I
DDLD
V
V
V
V
I
C
V
V
ODL
DD
CU877
I
(
(
IH
IN
IH
IX
IN
IL
IL
I
DC
AC
GND
V
DD
)
)
RESET#, CK, CK#
Each input
CK, CK#
CK, CK#
CK, CK#
CK, CK#
CK, CK#
CK, CK#
RESET#
RESET#
RESET#
Pins
V
V
N/A
CK
CK
R = 60Ω
R = 60Ω
V
2
DD
RESET# = V
13
(not connected to PCB)
CK, CK# = 270 MHz, all
V
V
V
Differential input
Differential input
Differential input
Differential input
Differential input
CK = CK# = LOW
I
I
I
outputs open
= V
= V
= V
Condition
LVCMOS
LVCMOS
Micron Technology, Inc., reserves the right to change products or specifications without notice.
SS
Symbol
DD
DD
V
DD
Q; V
IL
t
Q or V
Q or V
Q or V
(
LS
t
DC
L
I
I
)
= V
Register and PLL Specifications
SS
SS
SS
IH
Q
Q
Q
(
AC
) or
Min
V
0°C ≤ T
1.0
0.0
2.0
30
DD
0.65 × V
0.65 × V
(V
= +1.8V ±0.1V
DD
–250
Min
–0.3
0.15
–10
100
0.3
0.6
©2005 Micron Technology, Inc. All rights reserved.
OPR
2
Q/2) -
DD
DD
≤ +55°C
–0.50
Max
V
V
V
0.35 × V
0.35 × V
(V
15
33
4
DD
DD
DD
DD
Max
0.15
250
500
300
Q + 0.3
Q + 0.4
Q + 0.4
10
Q/2) +
3
DD
DD
Units
MHz
V/ns
KHz
Units
µs
%
mV
mV
mV
mV
mV
mA
µA
µA
µA
µA
pF
V
V
V

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