MT18VDVF12872DG-40BF1 Micron Technology Inc, MT18VDVF12872DG-40BF1 Datasheet - Page 9

• Manufacturer Part Number: MT18VDVF12872DG-40BF1
• Description: MODULE DDR 1GB 184-DIMM VLP
• Manufacturer: Micron Technology Inc

Specifications of MT18VDVF12872DG-40BF1

• Memory Type: DDR SDRAM
• Memory Size: 1GB
• Speed: 400MT/s
• Package / Case: 184-DIMM
• Main Category: DRAM Module
• Sub-category: DDR SDRAM
• Module Type: 184VLPRDIMM
• Device Core Size: 72b
• Organization: 128Mx72
• Total Density: 1GByte
• Chip Density: 512Mb
• Maximum Clock Rate: 400MHz
• Operating Supply Voltage (typ): 2.6V
• Operating Current: 1.8A
• Number Of Elements: 18
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.5V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Pin Count: 184
• Mounting: Socket
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Register and PLL Specifications
Table 9:
PDF: 09005aef81c73825/Source: 09005aef81c73837
DVF18C_128x72D.fm - Rev. B 10/07 EN
Parameter
DC high-level
input voltage
DC low-level
input voltage
AC high-level
input voltage
AC low-level
input voltage
Output high voltage
Output low voltage
Input current
Static standby
Static operating
Dynamic operating
(clock tree)
Dynamic operating
(per each input)
Input capacitance
Input capacitance
(per device, per pin)
(per device, per pin)
Register Specifications
SSTV16859 devices or equivalent JESD82-4B
Notes:
Symbol
V
V
V
V
I
I
IH
IH
V
IL
IL
V
I
I
DDD
DDD
DD
DD
C
C
OH
I
(
(
OL
(
(
1. Timing and switching specifications for the register listed above are critical for proper oper-
I
DC
AC
DC
AC
I
I
)
)
)
)
ation of the DDR SDRAM RDIMMs. These are meant to be a subset of the parameters for
the specific device used on the module. Detailed information for this register is available in
JEDEC-standard JESD82.
Address, control,
Address, control,
Address, control,
Address, control,
All inputs except
Parity output
Parity output
command
command
command
command
All pins
All pins
All pins
RESET#
RESET#
Pins
n/a
n/a
duty cycle; One data input
RESET# = V
RESET# = V
CK# switching 50 percent
CK# switching 50 percent
or V
or V
RESET# = V
switching at
V
I
percent duty cycle
V
V
V
= V
IL
IL
I
I
I
RESET# = V
= V
(
(
= V
= V
V
AC
AC
Condition
9
duty cycle
DD
IH
1GB (x72, ECC, DR) 184-Pin DDR VLP RDIMM
LVCMOS
LVCMOS
SSTL_25
SSTL_25
SSTL_25
SSTL_25
), I
), I
DD
DD
REF
(
I
AC
Q = 1.8V
O
DD
DD
O
O
Q or V
Q or V
= 0
SS
) or V
±250mV;
, V
, V
= 0; CK and
= 0; CK and
Q (I
t
CK/2, 50
I
I
SS
= V
= V
Micron Technology, Inc., reserves the right to change products or specifications without notice.
O
Q;
IL
SS
SS
(
= 0)
IH
IH
Q
Q
DC
(
(
)
AC
AC
)
)
Register and PLL Specifications
V
V
REF
REF
V
DD
(
(
Min
DC
DC
–5.0
2.5
–
–
–
–
–
–
–
–
– 0.2
) + 150
) + 310
©2005 Micron Technology, Inc. All rights reserved.
V
V
manufacturer
manufacturer
manufacturer
manufacturer
REF
REF
Varies by
Varies by
Varies by
Varies by
(
(
Max
+5.0
DC
V
DC
100
0.2
3.5
–
DD
–
) – 150
) – 310
Units
mV
mV
mV
mV
mA
µA
µA
µA
µA
pF
pF
V
V