MT4VDDT1664HY-335F3 Micron Technology Inc, MT4VDDT1664HY-335F3 Datasheet - Page 17
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MT4VDDT1664HY-335F3
Manufacturer Part Number
MT4VDDT1664HY-335F3
Description
MODULE DDR 128MB 200-SODIMM
Manufacturer
Micron Technology Inc
Specifications of MT4VDDT1664HY-335F3
Memory Type
DDR SDRAM
Memory Size
128MB
Speed
200MHz
Package / Case
200-SODIMM
Main Category
DRAM Module
Sub-category
DDR SDRAM
Module Type
200SODIMM
Device Core Size
64b
Organization
16Mx64
Total Density
128MByte
Chip Density
256Mb
Access Time (max)
700ps
Maximum Clock Rate
333MHz
Operating Supply Voltage (typ)
2.5V
Operating Current
880mA
Number Of Elements
4
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Pin Count
200
Mounting
Socket
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
557-1344
Table 15: Capacitance
Note: 11; notes appear on pages 19–22
Table 16: DDR SDRAM Component Electrical Characteristics and Recommended AC
Notes: 1–5, 12-15, 29; notes appear on pages 19–22; 0°C
pdf: 09005aef8086ea3d, source: 09005aef8086ea0b
DD4C8_16_32x64HG.fm - Rev. C 9/04 EN
AC CHARACTERISTICS
PARAMETER
Access window of DQs from CK/
CK#
CK high-level width
CK low-level width
Clock cycle time
DQ and DM input hold time relative to DQS
DQ and DM input setup time relative to DQS
DQ and DM input pulse width (for each
input)
Access window of DQS from CK/
CK#
DQS input high pulse width
DQS input low pulse width
DQS-DQ skew, DQS to last DQ valid, per
group, per access
Write command to first DQS latching
transition
DQS falling edge to CK rising - setup time
DQS falling edge from CK rising - hold time
Half clock period
Data-out high-impedance window from CK/
CK#
Data-out low-impedance window from CK/
CK#
Address and control input hold time (fast
slew rate)
Address and control input setup time (fast
slew rate)
Address and control input hold time (slow
slew rate)
Address and control input setup time (slow
slew rate)
PARAMETER
Input/Output Capacitance: DQ, DQS, DM
Input Capacitance: Command and Address, S#, CKE
Input Capacitance: CK, CK# (64MB)
Input Capacitance: CK, CK# (128MB, 256MB)
Operating Conditions
CL = 2.5
CL = 2
SYMBOL MIN
t
t
CK (2.5)
t
t
t
t
DQSCK
t
t
CK (2)
DQSQ
DQSH
DIPW
t
DQSL
DQSS
t
t
t
t
DSH
t
t
t
t
t
t
DSS
t
t
t
DH
AC
CH
HP
HZ
IH
IH
CL
DS
IS
IS
LZ
F
S
F
S
T
-0.70
-0.60
-0.70
0.45
0.45
0.45
0.45
1.75
0.35
0.35
0.75
0.75
0.75
0.80
0.80
7.5
0.2
0.2
A
6
17
t
CH,
-335
+70°C; V
MAX
+0.70
+0.60
t
+0.70
0.55
0.55
0.45
1.25
CL
64MB, 128MB, 256MB (x64, SR)
13
13
200-PIN DDR SDRAM SODIMM
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DD
SYMBOL
= V
-0.75
-0.75
-0.75
MIN
0.45
0.45
0.50
0.50
1.75
0.35
0.35
0.75
0.90
0.90
C
C
C
C
7.5
7.5
0.2
0.2
IO
I1
I2
I2
1
1
t
DD
CH,
-262
Q = +2.5V ±0.2V
t
MAX
+0.75
+0.75
CL
+0.75
0.55
0.55
0.50
1.25
13
13
7.5/10
-0.75
-0.75
-0.75
MIN
0.45
0.45
1.75
0.35
0.35
0.75
7.5
0.5
0.5
0.2
0.2
.90
.90
-26A/-265
1
1
t
CH,
MIN
©2004 Micron Technology, Inc. All rights reserved.
4.0
8.0
7.0
6.0
+0.75
+0.75
t
+0.75
MAX
0.55
0.55
1.25
CL
0.5
13
13
MAX
12.0
5.0
9.0
9.0
UNITS NOTES
t
t
t
t
t
t
t
ns
CK
CK
ns
ns
ns
ns
ns
ns
CK
CK
ns
CK
CK
CK
ns
ns
ns
ns
ns
ns
ns
UNITS
41, 46
41, 46
23, 27
23, 27
22, 23
16, 38
16, 38
pF
pF
pF
pF
26
26
27
30
12
12
12
12