SCD5582A OSRAM Opto Semiconductors Inc, SCD5582A Datasheet - Page 13
![DISPLAY 8CHAR .145" 5X5 HE RED](/photos/26/62/266277/00025225_0_sml.jpg)
SCD5582A
Manufacturer Part Number
SCD5582A
Description
DISPLAY 8CHAR .145" 5X5 HE RED
Manufacturer
OSRAM Opto Semiconductors Inc
Series
Intelligent Display®r
Datasheet
1.SCD5584A.pdf
(17 pages)
Specifications of SCD5582A
Millicandela Rating
265µcd
Size / Dimension
1.50" L x 0.39" W x 0.20" H (38.10mm x 10.00mm x 5.08mm)
Color
Red
Configuration
5 x 5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Forward (vf) Typ
-
Internal Connection
-
Lead Free Status / Rohs Status
Details
Other names
Q68100A0997
Cascading Multiple Displays
Multiple displays can be cascaded using the CLKSEL and CLK I/O pins as shown below. The display designated as the Master Clock
source should have its CLKSEL pin tied high and the slaves should have their CLKSEL pins tied low. All CLK I/O pins should be tied
together. One display CLK I/O can drive 15 slave CLK I/Os. Use RST to synchronize all display counters.
Cascading Multiple Displays
Loading Data Into the Display
Use following procedure to load data into the display:
1.
2.
3.
4.
5.
6.
2006-01-23
Power up the display.
Bring RST low (600 ns duration minimum) to clear the Multiplex Counter, Address Register, Control Word Register,
User Ram and Data Register. The display will be blank. Display brightness is set to 100%.
If a different brightness is desired, load the proper brightness opcode into the Control Word Register.
Load the Digit Address into the display.
Load display row and column data for the selected digit.
Repeat steps 4 and 5 for all digits.
RST
DATA
SDCLK
A0
A1
A2
A3
LD
Decoder
Address
DATA
RST
Chip
CE
Intelligent Display
0
15
SCD5580A, SCD5581A, SCD5582A, SCD5583A, SCD5584A
CLK I/O
SDCLK
Address Decode 1-14
CLK SEL
LOAD
V
CC
14 more displays
in between
13
DATA
RST
Intelligent Display
CLK I/O
SDCLK
CLK SEL
LOAD
IDCD5030