HFBR-1115TZ Avago Technologies US Inc., HFBR-1115TZ Datasheet - Page 5

• Manufacturer Part Number: HFBR-1115TZ
• Description: XMITTER MOD 1300NM 125M 16DIP ST
• Manufacturer: Avago Technologies US Inc.

Specifications of HFBR-1115TZ

• Connector Type: ST
• Wavelength: 1300nm
• Spectral Bandwidth: 137nm
• Data Rate Max: 0.1Gbps
• Supply Voltage: 5V
• Wavelength Typ: 1300nm
• Peak Reflow Compatible (260 C): Yes
• Leaded Process Compatible: Yes
• Applications: FDDI Concentrators, Bridges, Routers
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Capacitance: -
• Current - Dc Forward (if): -
• Voltage - Forward (vf) Typ: -
• Voltage - Dc Reverse (vr) (max): -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

+5 Vdc
DATA
DATA
GND
Solder and Wash Process
Compatibility
The transmitter and receiver are
delivered with protective process
caps covering the individual ST*
ports. These process caps protect
the optical subassemblies during
wave solder and aqueous wash
processing and act as dust covers
during shipping.
These data link modules are
compatible with either industry
standard wave- or hand-solder
processes.
NOTES:
1. RESISTANCE IS IN OHMS. CAPACITANCE IS IN MICROFARADS. INDUCTANCE IS IN MICROHENRIES.
2. TERMINATE TRANSMITTER INPUT DATA AND DATA-BAR AT THE TRANSMITTER INPUT PINS. TERMINATE THE RECEIVER OUTPUT DATA, DATA-BAR, AND SIGNAL DETECT-BAR
3. MAKE DIFFERENTIAL SIGNAL PATHS SHORT AND OF SAME LENGTH WITH EQUAL TERMINATION IMPEDANCE.
4. SIGNAL TRACES SHOULD BE 50 OHMS MICROSTRIP OR STRIPLINE TRANSMISSION LINES. USE MULTILAYER, GROUND-PLANE PRINTED CIRCUIT BOARD FOR BEST HIGH-
5. USE HIGH-FREQUENCY, MONOLITHIC CERAMIC BYPASS CAPACITORS AND LOW SERIES DC RESISTANCE INDUCTORS. RECOMMEND USE OF SURFACE-MOUNT COIL
6. DEVICE GROUND PINS SHOULD BE DIRECTLY AND INDIVIDUALLY CONNECTED TO GROUND.
7. CAUTION: DO NOT DIRECTLY CONNECT THE FIBER-OPTIC MODULE PECL OUTPUTS (DATA, DATA-BAR, SIGNAL DETECT, SIGNAL DETECT-BAR, V
8. (*) OPTIONAL METAL ST OPTICAL PORT TRANSMITTER AND RECEIVER MODULES WILL HAVE PINS 8 AND 9 ELECTRICALLY CONNECTED TO THE METAL PORT ONLY AND
Figure 7. Recommended interface circuitry and power supply filter circuits.
5
AT THE FOLLOW-ON DEVICE INPUT PINS. FOR LOWER POWER DISSIPATION IN THE SIGNAL DETECT TERMINATION CIRCUITRY WITH SMALL COMPROMISE TO THE SIGNAL
QUALITY, EACH SIGNAL DETECT OUTPUT CAN BE LOADED WITH 510 OHMS TO GROUND INSTEAD OF THE TWO RESISTOR, SPLIT-LOAD PECL TERMINATION SHOWN IN THIS
SCHEMATIC.
FREQUENCY PERFORMANCE.
INDUCTORS AND CAPACITORS. IN LOW NOISE POWER SUPPLY SYSTEMS, FERRITE BEAD INDUCTORS CAN BE SUBSTITUTED FOR COIL INDUCTORS. LOCATE POWER
SUPPLY FILTER COMPONENTS CLOSE TO THEIR RESPECTIVE POWER SUPPLY PINS. C7 IS AN OPTIONAL BYPASS CAPACITOR FOR IMPROVED, LOW-FREQUENCY NOISE
POWER SUPPLY FILTER PERFORMANCE.
PROPER CURRENT LIMITING IMPEDANCE.
NOT CONNECTED TO THE INTERNAL SIGNAL GROUND.
A
R3
82
0.1
C5
TERMINATE D, D
R2
82
AT Tx INPUTS
L2
1
130
R4
0.1
C2
130
R1
*
9 NC
10 GND
11 V
12 V
13 GND
14 D
15 D
16 NC
CC
CC
Tx
GND 6
GND 5
GND 4
GND 3
V
PIN
NC 8
NO
NC 1
BB
Shipping Container
The data link modules are
packaged in a shipping container
designed to protect it from
mechanical and ESD damage
during shipment or storage.
Board Layout–Interface Circuit and
Layout Guidelines
It is important to take care in the
layout of your circuit board to
achieve optimum performance
from these data link modules.
Figure 7 provides a good example
7
2
*
TOP VIEWS
*
9 NC
10
11 GND
12 GND
13 GND
14 SD
15 SD
16
NO
PIN
NO
PIN
Rx
GND 7
V
V
V
NC 8
NC 1
CC
CC
CC
D 3
D 2
6
5
4
*
0.1
of a power supply filter circuit that
works well with these parts. Also,
suggested signal terminations for
the Data, Data-bar, Signal Detect
and Signal Detect-bar lines are
shown. Use of a multilayer,
ground-plane printed circuit board
will provide good high-frequency
circuit performance with a low
inductance ground return path. See
additional recommendations noted
in the interface schematic shown in
Figure 7.
C6
C1
0.1
R10
130
R9
82
C7
10
(OPTIONAL)
INPUTS OF FOLLOW-ON DEVICES
R12
130
TERMINATE D, D, SD, SD AT
R11
82
L1
1
R7
82
BB
) TO GROUND WITHOUT
R5
C3
0.1
82
130
R8
C4
10
SD
130
R6
DATA
DATA
SD
A