APTS012A0X3-SRZ Lineage Power, APTS012A0X3-SRZ Datasheet - Page 17

• Manufacturer Part Number: APTS012A0X3-SRZ
• Description: CONV DC-DC 0.69 5.5V @ 12A SMD
• Manufacturer: Lineage Power
• Series: Micro TLynx™r
• Type: Point of Load (POL) Non-Isolated with Remote On/Offr

Specifications of APTS012A0X3-SRZ

• Output: 0.69 ~ 5.5V
• Number Of Outputs: 1
• Power (watts): 66W
• Mounting Type: Surface Mount
• Voltage - Input: 4.5 ~ 14V
• Package / Case: 10-SMD Module
• 1st Output: 0.69 ~ 5.5 VDC @ 12A
• Size / Dimension: 0.80" L x 0.45" W x 0.33" H (20.3mm x 11.4mm x 8.5mm)
• Power (watts) - Rated: 66W
• Operating Temperature: -40°C ~ 85°C
• Efficiency: 94%
• Approvals: CSA, EN, UL, VDE
• Output Power: 66 W
• Input Voltage Range: 4.5 V to 14 V
• Output Voltage (channel 1): 0.69 V to 5.5 V
• Output Current (channel 1): 12 A
• Package / Case Size: SMD
• Output Type: Non-Isolated
• Output Voltage: 0.69 V to 5.5 V
• Product: Non-Isolated / POL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• 3rd Output: -
• 2nd Output: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 555-1129-2

Data Sheet
December 2, 2010
Figure 46. Circuit Configuration for margining
Output voltage
For proper voltage sequencing, first, input voltage is
applied to the module. The On/Off pin of the module is
left unconnected (or tied to GND for negative logic
modules or tied to V
the module is ON by default. After applying input
voltage to the module, a minimum 10msec delay is
required before applying voltage on the SEQ pin.
During this time, a voltage of 50mV (± 20 mV) is
maintained on the SEQ pin.
This can be done by applying the sequencing voltage
through a resistor R1connected in series with the SEQ
pin. This delay gives the module enough time to
complete its internal power-up soft-start cycle. During
the delay time, the SEQ pin should be held close to
ground (nominally 50mV ± 20 mV). This is required to
keep the internal op-amp out of saturation thus
preventing output overshoot during the start of the
sequencing ramp. By selecting resistor R1 (see fig. 47)
according to the following equation
the voltage at the sequencing pin will be 50mV when
the sequencing signal is at zero.
After the 10msec delay, an analog voltage is applied to
the SEQ pin and the output voltage of the module will
track this voltage on a one-to-one volt bases until the
output reaches the set-point voltage. To initiate
simultaneous shutdown of the modules, the SEQ pin
voltage is lowered in a controlled manner. The output
voltage of the modules tracks the voltages below their
set-point voltages on a one-to-one basis. A valid input
voltage must be maintained until the tracking and output
voltages reach ground potential.
LINEAGE
POWER
MODULE
R
1
=
IN
Trim
Vo
GND
V
for positive logic modules) so that
IN
24950
−
Rtrim
. 0
05
Q2
Q1
4.5 – 14Vdc input; 0.69Vdc to 5.5Vdc output; 12A output current
ohms,
Rmargin-down
Rmargin-up
12V Micro TLynx
Figure 47. Circuit showing connection of the
sequencing signal to the SEQ pin.
When using the EZ-SEQUENCE
start-up of the module, pre-bias immunity during start-up
is disabled. The pre-bias immunity feature of the
module relies on the module being in the diode-mode
during start-up. When using the EZ-SEQUENCE
feature, modules goes through an internal set-up time of
10msec, and will be in synchronous rectification mode
when the voltage at the SEQ pin is applied. This will
result in the module sinking current if a pre-bias voltage
is present at the output of the module. When pre-bias
immunity during start-up is required, the EZ-
SEQUENCE
additional guidelines on using the EZ-SEQUENCE
feature please refer to Application Note AN04-008
“Application Guidelines for Non-Isolated Converters:
Guidelines for Sequencing of Multiple Modules”, or
contact the Lineage Power technical representative for
additional information.
Power Good
The 12V MIcro TLynx
Good (PGOOD) signal that is implemented with an
open-drain output to indicate that the output voltage is
within the regulation limits of the power module. The
PGOOD signal will be de-asserted to a low state if any
condition such as overtemperature, overcurrent or loss
of regulation occurs that would result in the output
voltage going ±11% outside the setpoint value. The
PGOOD terminal should be connected through a pullup
resistor (suggested value 100KΩ) to a source of 6VDC
or less.
Synchronization
The 12V Micro TLynx
synchronized using an external signal. Details of the
SYNC signal are provided in the Electrical
Specifications table. If the synchronization function is
not being used, leave the SYNC pin floating.
VIN+
GND
TM
R1
: Non-isolated DC-DC Power Modules
SEQ
TM
feature must be disabled. For
499K
TM
TM
10K
series of modules can be
12A modules provide a Power
MODULE
TM
+
-
feature to control
OUT
TM
TM
17