SCFLXRAYADPTS12 Freescale Semiconductor, SCFLXRAYADPTS12 Datasheet - Page 34

• Manufacturer Part Number: SCFLXRAYADPTS12
• Description: ADAPTER BOARD FRDC
• Manufacturer: Freescale Semiconductor

Specifications of SCFLXRAYADPTS12

• Accessory Type: *
• For Use With/related Products: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 11
34
Num
J2a
J2b
J3a
J3b
J10
J1
J4
J5
J6
J7
J8
J9
–
SCAN DATA
SCAN DATA
BOUNDARY
BOUNDARY
provides the IEEE 1149.1 JTAG timing diagram and
OUTPUT
TCK Frequency of Operation
TCK Cycle Time
TCK Clock Pulse High Width
TCK Clock Pulse Low Width
TCK Fall Time (V
TCK Rise Time (V
TDI, TMS to TCK rising (Input Setup)
TCK rising to TDI, TMS Invalid (Hold)
Boundary Scan Data Valid to TCK (Setup)
TCK to Boundary Scan Data Invalid to rising edge (Hold)
TRST Pulse Width (asynchronous to clock edges)
TCK falling to TDO Valid (signal from driven or three-state)
TCK falling to TDO High Impedance
INPUT
TDI, TMS
TRST
TDO
TCK
IH
IL
=2.4 V to V
=0.5 v to V
Table 30. JTAG AC Timing Specifications
SCF5250 Data Sheet:
J2A
Figure 11. JTAG AC Timing Diagram
J11
J6
J9
IL
IH
Characteristic
=0.5 V)
=2.4 V)
J1
J4
Technical
Data,
J5
J7
J2B
Table 30
Rev. 1.3
J8
J12
J10
provides the timing parameters.
Min
100
tbd
tbd
25
25
10
12
0
–
–
8
–
–
J3A
Freescale Semiconductor
Max
10
15
15
–
–
–
5
5
–
–
–
–
–
J3B
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns