C8051T610DB24 Silicon Laboratories Inc, C8051T610DB24 Datasheet - Page 119
![DAUGHTER BOARD T610 24QFN SOCKET](/photos/9/2/90276/c8051t610db24_sml.jpg)
C8051T610DB24
Manufacturer Part Number
C8051T610DB24
Description
DAUGHTER BOARD T610 24QFN SOCKET
Manufacturer
Silicon Laboratories Inc
Datasheet
1.C8051T610DB32.pdf
(218 pages)
Specifications of C8051T610DB24
Module/board Type
Socket Module - QFN
Processor To Be Evaluated
C8051T61x
Interface Type
USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051T610DK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
336-1507
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Pin Number
In this example, the crossbar is configured to assign the UART TX0 and RX0 signals, the
SMBus signals, and the SYSCLK signal. Note that the SMBus signals are assigned as a
pair, and there are no pins skipped using the XBR0 register.
configuration.
1
2
3
4
All unassigned pins can be used as GPIO or for other non-crossbar functions.
st
nd
rd
th
Figure 21.4. Priority Crossbar Decoder Example 1 - No Skipped Pins
TX0 is assigned to P0.4
SYSCLK
SYSCLK is assigned to P0.2
SDA and SCL are assigned to P0.0 and P0.1, respectively.
Function
RX0 is assigned to P0.5
These boxes represent the port pins which are used by the peripherals in this
Pin Skip
Settings
Special
Signals
CP0A
CP1A
CEX0
CEX1
CEX2
CEX3
CEX4
MISO
MOSI
NSS*
SCK
SDA
RX0
SCL
CP0
CP1
Port
TX0
ECI
T0
T1
0 1 2 3 4 5 6 7
0 0 0 0 0 0 0 0
P0SKIP
P0
0 1 2 3 4 5 6 7
0 0 0 0 0 0 0 0
Rev 1.0
C8051T610/1/2/3/4/5/6/7
P1SKIP
P1
0 1 2 3 4 5 6 7
0 0 0 0 x x x x
P2SKIP
P2
119
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