C8051T600QDB Silicon Laboratories Inc, C8051T600QDB Datasheet - Page 27
![BOARD SOCKET DAUGHTER QFN](/photos/9/3/90365/c8051t600qdb_sml.jpg)
C8051T600QDB
Manufacturer Part Number
C8051T600QDB
Description
BOARD SOCKET DAUGHTER QFN
Manufacturer
Silicon Laboratories Inc
Datasheet
1.C8051T600EDB.pdf
(188 pages)
Specifications of C8051T600QDB
Module/board Type
Socket Module - QFN
Data Bus Width
8 bit
Operating Supply Voltage
+ 1.8 V to + 3.6 V
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051T600DK
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1406
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Notes:
General
Solder Mask Design
Stencil Design
Card Assembly
Dimension
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ASME Y14.5M-1994.
3. This Land Pattern Design is based on the IPC-7351 guidelines.
4. All dimensions shown are at Maximum Material Condition (MMC). Least Material Condition
5. All metal pads are to be non-solder mask defined (NSMD). Clearance between the solder
6. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used
7. The stencil thickness should be 0.125 mm (5 mils).
8. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pads.
9. A No-Clean, Type-3 solder paste is recommended.
10. The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for
(LMC) is calculated based on a Fabrication Allowance of 0.05 mm.
mask and the metal pad is to be 60 m minimum, all the way around the pad.
to assure good solder paste release.
Small Body Components.
C1
G1
E
Table 6.2. MSOP-10 PCB Land Pattern Dimensions
Figure 6.2. MSOP-10 PCB Land Pattern
3.00
Min
4.40 REF
0.50 BSC
Max
—
Rev. 1.2
Dimension
C8051T600/1/2/3/4/5/6
X1
Y1
Z1
Min
—
—
1.40 REF
Max
0.30
5.80
27
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