LFDAS12XSCT Freescale Semiconductor, LFDAS12XSCT Datasheet - Page 297
LFDAS12XSCT
Manufacturer Part Number
LFDAS12XSCT
Description
HARDWARE MC9S12XS 48-PIN
Manufacturer
Freescale Semiconductor
Datasheet
1.LFDAS12XSCT.pdf
(738 pages)
Specifications of LFDAS12XSCT
Module/board Type
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
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11.1.3
The basic features of the MSCAN are as follows:
11.1.4
For a description of the specific MSCAN modes and the module operation related to the system operating
modes refer to
1. Depending on the actual bit timing and the clock jitter of the PLL.
Freescale Semiconductor
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Implementation of the CAN protocol — Version 2.0A/B
— Standard and extended data frames
— Zero to eight bytes data length
— Programmable bit rate up to 1 Mbps
— Support for remote frames
Five receive buffers with FIFO storage scheme
Three transmit buffers with internal prioritization using a “local priority” concept
Flexible maskable identifier filter supports two full-size (32-bit) extended identifier filters, or four
16-bit filters, or eight 8-bit filters
Programmable wake-up functionality with integrated low-pass filter
Programmable loopback mode supports self-test operation
Programmable listen-only mode for monitoring of CAN bus
Programmable bus-off recovery functionality
Separate signalling and interrupt capabilities for all CAN receiver and transmitter error states
(warning, error passive, bus-off)
Programmable MSCAN clock source either bus clock or oscillator clock
Internal timer for time-stamping of received and transmitted messages
Three low-power modes: sleep, power down, and MSCAN enable
Global initialization of configuration registers
Features
Modes of Operation
Section 11.4.4, “Modes of
S12XS Family Reference Manual Rev. 1.11
Operation”.
1
Freescale’s Scalable Controller Area Network (S12MSCANV3)
297
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