FA-80GF Renesas Electronics America, FA-80GF Datasheet
FA-80GF
Specifications of FA-80GF
Related parts for FA-80GF
FA-80GF Summary of contents
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To our customers, Old Company Name in Catalogs and Other Documents st On April 1 , 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the ...
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... Renesas Electronics products are not subject to radiation resistance design. Please be sure to implement safety measures to guard them against the possibility of physical injury, and injury or damage caused by fire in the event of the failure of a Renesas Electronics product, such as safety design for hardware and software including but not limited to redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures ...
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... As peripheral hardware, a prescaler, PLL frequency synthesizer, and frequency counter for digital tuning systems are provided, as well as many I/O ports, timers, A/D converter, serial interface, and a power-ON clear circuit. In addition, three serial interfaces, I Moreover, a flash memory model, the PD178F124, that operates in the same supply voltage range as the mask ROM models, and various development tools are also available. For the detailed functional description, refer to the following User’ ...
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APPLICATION FIELD Car stereos ORDERING INFORMATION Part Number PD178023GF- -3B9 PD178023GC- -8BT PD178024GF- -3B9 PD178024GC- -8BT Remark indicates ROM code suffix, which Package 80-pin plastic QFP (14 20) 80-pin plastic QFP (14 14) 80-pin plastic QFP (14 ...
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DEVELOPMENT OF 8-BIT DTS SERIES Flash memory model or PROM model 80 pins PD178F048 Internal OSD controller 8-bit PWM 4 channels 14-bit PWM 1 channel 100 pins PD178F098 TM Internal IEBus controller and UART 80 pins PD178F054 Timer and 3-wire ...
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... I/O port Total • CMOS I/O • CMOS input • N-ch open-drain output : 3 pins A/D converter 8-bit resolution 2 Serial interface • I • 3-wire mode • UART mode Timer • Basic timer (timer carry FF (10 Hz channel • 8-bit timer/event counter • Watchdog timer Buzzer output 1 channel (1 kHz, 1 ...
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Item Frequency counter Frequency measurement • AMIFC pin: For 450-kHz counting • FMIFC pin: For 450-kHz/10.7-MHz counting Reset • Reset by RESET pin • Internal reset by watchdog timer • Reset by power-ON clear circuit • Detection of less than ...
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PIN CONFIGURATION (Top View) • 80-pin plastic QFP (14 20) PD178023GF- -3B9, 178024GF RESET 2 P10/ANI0 3 P11/ANI1 4 P12/ANI2 5 ...
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QFP (14 14) PD178023GC- -8BT, 178024GC P10/ANI0 1 P11/ANI1 2 P12/ANI2 3 P13/ANI3 4 P14/ANI4 5 P15/ANI5 ...
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PIN NAME AMIFC : AM intermediate frequency counter input ANI0-ANI5 : A/D converter input BEEP0 : Buzzer output EO0, EO1 : Error out output FMIFC : FM intermediate frequency counter input GND : Ground GNDPLL : PLL ground GNDPORT : ...
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... BLOCK DIAGRAM TI50/P33 8-bit TIMER/ EVENT COUNTER50 TO50/P130 TI51/P34 8-bit TIMER/ TO51/P131 EVENT COUNTER51 WATCHDOG TIMER BASIC TIMER SI3/P70 SERIAL SO3/P71 INTERFACE3 SCK3/P72 SDA0/P76 BUS SCL0/P77 RXD0/P74 UART0 TXD0/P75 INTP0/P00- INTERRUPT 5 INTP4/P04 CONTROL BEEP0/P36 BUZZER OUTPUT RESET X1 X2 SYSTEM CONTROL V PORT ...
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... FEATURES OF PERIPHERAL HARDWARE FUNCTIONS ..................................................... 19 3.1 Ports ........................................................................................................................................ 19 3.2 Clock Generation Circuit ..................................................................................................... 20 3.3 Timers ..................................................................................................................................... 20 3.4 Buzzer Output Control Circuit ............................................................................................. 22 3.5 A/D Converter ........................................................................................................................ 23 3.6 Serial Interface ...................................................................................................................... 24 3.7 PLL Frequency Synthesizer ................................................................................................ 26 3.8 Frequency Counter ............................................................................................................... 27 4. INTERRUPT FUNCTION ............................................................................................................... 28 5. STANDBY FUNCTION ................................................................................................................... 31 6. RESET FUNCTION ........................................................................................................................ 31 7. INSTRUCTION SET ....................................................................................................................... 32 8 ...
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PIN FUNCTION LIST 1.1 Port Pins Pin Name I/O P00-P04 I/O Port 0. 7-bit I/O port. P05, P06 Can be set in input or output mode in 1-bit units. P10-P15 Input Port 1. 6-bit input port. P30-P32 I/O Port ...
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... Pins Other Than Port Pins Pin Name I/O INTP0-INTP4 Input External maskable interrupt input whose valid edge (rising edge, falling edge, or both rising and falling edges) can be specified. SI3 Input Serial data input to serial interface. SO3 Output Serial data output from serial interface. ...
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I/O Circuits of Pins and Recommended Connections of Unused Pins Table 1-1 shows the types of the I/O circuits of the respective pins and the recommended connections of the pins when they are not used. For the configuration of ...
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Figure 1-1. I/O Circuits of Respective Pins (1/2) Type 2 IN Schmitt trigger input with hysteresis characteristics Type 5-A Pullup enable V DD Data P-ch Output N-ch disable Input enable Type Data P-ch Output N-ch disable Remark ...
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Figure 1-1. I/O Circuits of Respective Pins (2/2) Type 19 OUT N-ch Type 25 P-ch Comparator + – N-ch V (Threshold voltage) REF Input enable Note This switch is selectable in software only for the VCOL and VCOH pins. Remark ...
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MEMORY SPACE Figure 2-1 shows the memory map of the PD178023, 178024 Special function registers 256 General-purpose registers ...
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Memory Size Select Register (IMS) The memory size select register (IMS) sets the internal memory capacity. Set the PD178023, PD178024 to C6H, C8H respectively. Use an 8-bit memory manipulation instruction to set the IMS. This register is set to ...
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Internal Extension RAM Size Select Register (IXS) The internal extension RAM size select register (IXS) sets the internal extension RAM capacity. Use the PD178023, PD178024 with the initial value (0CH). Use an 8-bit memory manipulation instruction to set the ...
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FEATURES OF PERIPHERAL HARDWARE FUNCTIONS 3.1 Ports The following three types of ports are available: • CMOS input (port 1) • CMOS I/O (ports and 12 pins • N-ch open-drain output (port 13) ...
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Clock Generation Circuit The instruction execution time can be changed as follows: • 0.45 s/0.89 s/1.78 s/3.56 s/7.11 s (system clock: 4.5-MHz crystal resonator) Figure 3-1. Block Diagram of Clock Generation Circuit X1 System clock Prescaler X2 f oscillator ...
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Figure 3-3. Block Diagram of 8-Bit Timer/Event Counter 50 8-bit compare register 50 (CR50) TI50/P33 Coincidence 8-bit counter (TM50 ...
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Figure 3-5. Block Diagram of Watchdog Timer Clock input 8 Divider circuit control circuit RUN Division mode select circuit OSTS2 OSTS1 OSTS0 Oscillation stabilization Watchdog timer clock time select register (OSTS) select register (WDCS) 3.4 Buzzer Output ...
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... Control circuit Voltage Control circuit comparator A/D conversion result register 3 (ADCR3 PFEN3 PFCM3 PFHRM3 A/D converter mode Power-fail comparison mode register 3 (ADM3) register 3 (PFM3) Internal bus Data Sheet U14126EJ2V0DS00 PD178023, 178024 V DD ADCS3 GND INTAD3 Power-fail comparison threshold value register 3 (PFT3) 23 ...
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... Serial Interface The PD178023 and 178024 have three serial interface channels. • Serial interface IIC0 • Serial interface SIO3 • Serial interface UART0 Figure 3-8. Block Diagram of Serial Interface IIC0 Slave address register 0 (SVA0) SDA0/P76 Coincidence signal Noise elimination circuit ...
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... Figure 3-9. Block Diagram of Serial Interface SIO3 SI3/P70 PM71 SO3/P71 P71 output latch SCK3/P72 PM72 P72 output latch Figure 3-10. Block Diagram of Serial Interface UART0 Receive buffer register 0 (RXB0) Receive shift register 0 PE0 RXD0/P74 (RX0) TXD0/P75 Reception control circuit PM75 (parity check) ...
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PLL Frequency Synthesizer Figure 3-11. Block Diagram of PLL Frequency Synthesizer PLL Mode Select Register (PLLMD) VCOH VCOL PLL PLL MD1 MD0 DMD DMD 2 VCOH Mixer Input Select Block VCOL 4.5 MHz Note Voltage Control Generator Note Lowpass ...
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Frequency Counter Figure 3-12. Block Diagram of Frequency Counter FMIFC Input select block AMIFC 2 IFC IFC IFC IFC MD1 MD0 CK1 CK0 IF counter mode select register (IFCMD) PD178023, 178024 2 Gate time control block Start/stop control block ...
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... Notes 1. If two or more maskable interrupts occur at the same time, they are acknowledged or kept pending according to their default priorities. The default priority 0 is the highest, while 16 is the lowest. 2. (A) to (D) under the heading Basic Configuration Type corresponds to (A) to (D) in Figure 4-1. ...
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... Figure 4-1. Basic Configuration of Interrupt Function (1/2) (A) Internal non-maskable interrupt Interrupt request (B) Internal maskable interrupt Interrupt IF request (C) External maskable interrupt External interrupt rising/ falling edge enable registers (EGP, EGN) Edge detection Interrupt circuit request Internal bus Vector table Priority control address generation ...
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Figure 4-1. Basic Configuration of Interrupt Function (2/2) (D) Software interrupt Interrupt request Remark IF : Interrupt request flag IE : Interrupt enable flag ISP : In-service priority flag MK : Interrupt mask flag PR : Priority specification flag 30 ...
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STANDBY FUNCTION There are the following two standby functions to reduce the system power consumption. • HALT mode : The CPU operating clock is stopped. The average consumption current can be reduced by intermittent operation in combination with the ...
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INSTRUCTION SET (1) 8-bit instructions MOV, XCH, ADD ADDC, SUB, SUBC, AND, OR, XOR, CMP, MULU, DIVUW, INC, DEC, ROR, ROL, RORC, ROLC, ROR4, ROL4, PUSH, POP, DBNZ Second Operand Note #byte A r sfr First Operand A ADD ...
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MOVW, XCHW, ADDW, SUBW, CMPW, PUSH, POP, INCW, DECW Second Operand #word AX First Operand AX ADDW SUBW CMPW Note rp MOVW MOVW sfrp MOVW MOVW saddrp MOVW MOVW !addr16 MOVW SP MOVW MOVW Note Only when ...
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Bit manipulation instructions MOV1, AND1, OR1, XOR1, SET1, CLR1, NOT1, BT, BF, BTCLR Second Operand A.bit sfr.bit First Operand A.bit sfr.bit saddr.bit PSW.bit [HL].bit CY MOV1 MOV1 AND1 AND1 OR1 OR1 XOR1 XOR1 (4) Call instruction/branch instructions CALL, CALLF, ...
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ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings ( Parameter Symbol Supply voltage PORT DD V PLL DD Input voltage V I Output voltage V Excluding P130 to P132 O Output breakdown V P130-P132 BDS ...
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DC Characteristics (T = – Parameter Symbol High-level input V P10-P15, P30-P32, P35-P37, P40-P47, P50-P57, IH1 voltage P60-P67, P71, P73, P120-P125 V P00-P06, P33, P34, P70, P72, P74-P75, RESET IH2 V P76, P77 IH3 (N-ch ...
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... Unless otherwise specified, the characteristics of a multiplexed pin are the same as those of the corresponding port pin. = 3.5 to 5.5 V) (2/2) DD Test Conditions OUT OUT OUT OUT OUT OUT Power-failure detection function Data memory retained PLL current. DD Data Sheet U14126EJ2V0DS00 PD178023, 178024 MIN. TYP. MAX. Unit –3 A – – –3 ...
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Reference Characteristics (T = – Parameter Symbol Supply current I When CPU and PLL are operating. DD3 Sine wave input to VCOH pin 160 MHz 0. ...
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... Notes 1. The first clock pulse is generated at the start condition after this period. 2. The device needs to internally supply a hold time of at least 300 ns for the SDA0 signal to fill the undefined area at the falling edge of the SCL0 (V 3. Unless the device extends the low hold time (t ...
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... KSI2 SCK3 SO3 output delay time t KSO2 SCK3 at rising or falling edge time Note C is the load capacitance of SO3 output line. (d) Serial interface (UART0: Dedicated baud rate generator output) Parameter Symbol Transfer rate 40 Test Conditions MIN. 800 t /2 – 50 KCY1 100 400 ...
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AC Timing Test Point (Excluding X1 Input) 0 Timing TI50,TI51 Interrupt Input Timing INTP0 to INTP4 RESET Input Timing RESET 0 Test Points 0 1/f TI5 t t TIL5 TIH5 ...
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Serial Transfer Timing bus mode: t LOW t R SCL0 DAT STA SDA0 t BUF Stop Start condition condition 3-wire serial I/O mode: SCK3 SI3 SO3 Remark ...
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A/D Converter Characteristics (T = – Parameter Symbol Resolution Total conversion V = 4.5 to 5.5 DD Note error Conversion time t CONV Analog input voltage V IAN Note Excluding quantization error ( 1/2LSB) PLL ...
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PACKAGE DRAWING 80-PIN PLASTIC QFP (14x20 NOTE Each lead centerline is located within 0. its true position (T.P.) at maximum material condition ...
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PLASTIC QFP (14x14 NOTE Each lead centerline is located within 0. its true position (T.P.) at maximum material condition ...
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... For details of the recommended soldering conditions, refer to information document Semiconductor Device Mounting Technology Manual (C10535E). For soldering methods and conditions other than those recommended, consult NEC. Table 10-1. Soldering Conditions for Surface-Mount Type PD178023GF-XXX-3B9: 80-pin plastic QFP (14 PD178024GF-XXX-3B9: 80-pin plastic QFP (14 ...
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... C compiler library source file common to 78K/0 series (2) Flash memory writing tools Fashpro III (Part number: Dedicated flash writer Note 4 FL-PR3 , PG-FP3) Note 4 FA-80GF Flash memory writing adapter Note 4 FA-80GC-8BT (3) Debugging tools • When in-circuit emulator IE-78K0-NS is used IE-78K0-NS In-circuit emulator common to 78K/0 series ...
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... IE-70000-PC-IF-C Interface adapter when a IBM PC/AT compatible machine is used (ISA bus supported) IE-70000-PCI-IF Interface adapter necessary when a PC with a PCI bus is used as host machine IE-78000-R-SV3 Interface adapter and cable necessary when an EWS is used as host machine IE-178134-NS-EM1 Emulation board for emulating the PD178024 subseries IE-78K0-R-EX1 Emulation probe conversion board necessary when using IE-178134-NS-EM1 on IE-78001-R-A ...
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... Structured Assembly U11789J Language Operation U11517J Language U11518J U14142J U13731J To be prepared EEU-985 Reference U10181J Operation U14910J External Parts User U10092J Open Interface Specifications Reference U11151J Reference U11539J Guide U11649J Operation U14379J Operation U14910J Data Sheet U14126EJ2V0DS00 Document No. English This document U14933E ...
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Related Documents for Embedded Software (User’s Manual) Title 78K/0 Series Real-time OS 78K/0 Series OS MX78K0 Other Documents Title SEMICONDUCTOR SELECTION GUIDE Products & Packages (CD-ROM) Semiconductor Device Mounting Technology Manual Quality Guides on NEC Semiconductor Devices NEC Semiconductor Device ...
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PD178023, 178024 Data Sheet U14126EJ2V0DS00 51 ...
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Data Sheet U14126EJ2V0DS00 PD178023, 178024 ...
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PD178023, 178024 Data Sheet U14126EJ2V0DS00 53 ...
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NOTES FOR CMOS DEVICES 1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. electricity as much as possible, and quickly ...
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... Fax: 01908-670-290 Fax: 91-504-2860 NEC Electronics Italiana s.r.l. NEC Electronics (Germany) GmbH Milano, Italy Scandinavia Office Tel: 02- Taeby, Sweden Fax: 02- Tel: 08-63 80 820 Fax: 08-63 80 388 PD178023, 178024 NEC Electronics Hong Kong Ltd. Hong Kong Tel: 2886-9318 Fax: 2886-9022/9044 NEC Electronics Hong Kong Ltd. ...
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... NEC, they must contact an NEC sales representative in advance to determine NEC's willingness to support a given application. (Note) (1) "NEC" as used in this statement means NEC Corporation and also includes its majority-owned subsidiaries. (2) "NEC semiconductor products" means any semiconductor product developed or manufactured by or for NEC (as defined above). PD178023, 178024 Not all The M8E 00 ...