STEVAL-PCC010V1 STMicroelectronics, STEVAL-PCC010V1 Datasheet - Page 16
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STEVAL-PCC010V1
Manufacturer Part Number
STEVAL-PCC010V1
Description
BOARD EVAL FOR ST802RT1
Manufacturer
STMicroelectronics
Datasheets
1.ST802RT1AFR.pdf
(58 pages)
2.STEVAL-PCC010V1.pdf
(37 pages)
3.STEVAL-PCC010V1.pdf
(9 pages)
Specifications of STEVAL-PCC010V1
Main Purpose
Interface, Ethernet Controller (PHY and MAC)
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
ST802RT1
Primary Attributes
1 Port, 100BASE-TX/10BASE-T
Secondary Attributes
MII, RMII
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-10360
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STEVAL-PCC010V1
Manufacturer:
STMicroelectronics
Quantity:
3
UM0819
Table 1.
1. See functionality of AN_xxx pins in the ST802RT1 product documentation.
PHY MII address
The MDIO/MDC serial management interface is used to access the internal registers of the
PHY. The Ethernet MAC that is connected to the PHY must know the appropriate PHY
address for successful communication. Special case is the PHY address 0x00. If this
address is used as the bootstrap address during the reset, the 00000 value is latched into
the internal receive mode control register RN14 (0x14h) but the PHY goes also to the
isolation mode. It is possible to change the PHY address by writing the RN14 register later
when application is already running.
Table 2.
Power-down
This pin is an active low input of the PHY and should be asserted low to put the device in
a power-down mode. During the power-down mode, TXP/TXN outputs and all LED outputs
are 3-stated, and the MII interface is isolated. The power-down functionality is also
achievable by software by asserting bit 11 of register RN00.
Table 3.
Loopback
Local loopback passes data internally from the transmitting to the receiving serial analog
logic. There are two ways to enter the internal loopback mode, either writing RN00 register,
bit 14 (MDIO/MDC) or by using boot strap LPBK pin (V
through 2.2 kΩ resistor).
Jumper
Jumper
Jumper
JP16
JP17
JP18
JP11
JP12
JP13
JP14
JP15
JP1
AN_1
AN_0
AN_EN - Auto-negotiation enable; when “high” - auto-
negotiation enabled, when “low” - auto-negotiation disabled
Power-down, if fitted - PHY works normally; if not fitted - PHY is
in power-down mode
Auto-negotiation jumper settings
PHY MII address jumper settings
Power-down jumper settings
Doc ID 16379 Rev 2
MII address 0
MII address 1
MII address 2
MII address 3
MII address 4
Description
Description
Description
(1)
DD
- enabled, GND - disabled,
Configuration and functionality
Default configuration
Default configuration
Default configuration
Fitted
High
High
High
High
Low
Low
Low
Low
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