Z8FMC160100KIT Zilog, Z8FMC160100KIT Datasheet - Page 353
Z8FMC160100KIT
Manufacturer Part Number
Z8FMC160100KIT
Description
KIT DEV FOR Z8 ENCORE Z8FMC16100
Manufacturer
Zilog
Series
Z8 Encore! MC™r
Datasheets
1.Z8FMC160100KIT.pdf
(7 pages)
2.Z8FMC160100KIT.pdf
(383 pages)
3.Z8FMC160100KIT.pdf
(20 pages)
Specifications of Z8FMC160100KIT
Main Purpose
Power Management, Motor Control
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
Z8FMC16100
Primary Attributes
3-Ph DC Motors
Secondary Attributes
Graphic User Interface
Processor To Be Evaluated
Z8FMC16100
Data Bus Width
8 bit
Interface Type
USB
For Use With
269-4664 - KIT ACC OPTO-ISO USB SMART CABLE269-4661 - KIT ACC ETHERNET SMART CABLE269-4539 - KIT ACCESSORY USB SMART CABLE
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3639
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Oscillator Divide Register (OSCDIV)
BITS
FIELD
RESET
R/W
ADDR
* The reset value is 08H if the option bit LPDEN is 0.
PS024613-0910
Bit
Position
[2]
FLPEN
[1:0]
SCKSEL
Bit
Position
[7:0]
DIV
Trim Control
Value (H) Description
Value (H) Description
7
00H to
Hex Address: F87
Hex Addresses: F88–F8F
Reserved
FFH
00
01
10
11
0
1
Flash Low Power Mode Enable
Flash Low Power Mode is disabled.
Flash Low Power Mode is enabled. The Flash will be powered down during idle
periods of the clock and powered up during Flash reads. This bit should only be
set if the frequency of the primary oscillator source is 8 MHz or lower. The reset
value of this bit is controlled by the LPDEN option bit during reset.
System Clock Oscillator Select
Internal precision oscillator functions as system clock at 5.6 MHz
Reserved
Crystal oscillator or external clock driver functions as system clock
Watchdog Timer oscillator functions as system clock
Oscillator Divide
00H - divider is disabled, all other entries are the divide value for scaling the
system clock.
6
5
4
F87H
00H*
R/W
DIV
3
Z8FMC16100 Series Flash MCU
2
Appendix A—Register Tables
Product Specification
1
0
341
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