MCP3421DM-BFG Microchip Technology, MCP3421DM-BFG Datasheet - Page 23

BOARD DEMO FOR MCP3421

MCP3421DM-BFG

Manufacturer Part Number
MCP3421DM-BFG
Description
BOARD DEMO FOR MCP3421
Manufacturer
Microchip Technology

Specifications of MCP3421DM-BFG

Main Purpose
Power Management, Battery Gauge
Utilized Ic / Part
MCP3421
Processor To Be Evaluated
MCP3421
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
5.6.5
The Master (microcontroller) and the slave (MCP3421)
use an acknowledge pulse as a hand shake of commu-
nication for each byte. The ninth clock pulse of each
byte is used for the acknowledgement. The clock pulse
is always provided by the Master (microcontroller) and
the acknowledgement is issued by the receiving device
of the byte (Note: The transmitting device must release
the SDA line during the acknowledge pulse.). The
acknowledgement is achieved by pulling-down the
SDA line “LOW” during the 9th clock pulse by the
receiving device.
FIGURE 5-6:
© 2009 Microchip Technology Inc.
SDA
SCL
(A)
ACKNOWLEDGE AND NON-
ACKNOWLEDGE
CONDITION
START
(B)
Data Transfer Sequence on I
ACKNOWLEDGE
ADDRESS OR
VALID
(D)
2
TO CHANGE
C Serial Bus.
ALLOWED
DATA
During reads, the Master (microcontroller) can
terminate the current read operation by not providing
an acknowledge bit (not Acknowledge (NAK)) on the
last byte. In this case, the MCP3421 device releases
the SDA line to allow the Master (microcontroller) to
generate a STOP or repeated START condition.
The non-acknowledgement (NAK) is issued by
providing the SDA line to “HIGH” during the 9th clock
pulse.
(D)
MCP3421
DS22003E-page 23
CONDITION
STOP
(C)
(A)

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