V2DIP2-64 FTDI, Future Technology Devices International Ltd, V2DIP2-64 Datasheet - Page 15

• Manufacturer Part Number: V2DIP2-64
• Description: MOD MCU-USB HOST CTLR 60-DIP
• Manufacturer: FTDI, Future Technology Devices International Ltd
• Series: Vinculum-IIr

Specifications of V2DIP2-64

• Main Purpose: Interface, USB 2.0 Host/Controller
• Embedded: Yes, ASIC
• Utilized Ic / Part: VNC2-64Q
• Primary Attributes: Dual A-Type Connector, UART / Parallel FIFO / SPI Interfaces
• Secondary Attributes: LED Status Indicators
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 768-1053

3.7 Parallel FIFO Interface-Synchronous Mode
The Parallel FIFO Synchronous mode has an eight bit data bus, individual read and write strobes, two
hardware flow control signals, an output enable and a clock out.
The synchronous FIFO mode uses the parallel FIFO interface signals detailed in Table 3.6 and additional
two signals detailed in Table 3.8.
J2-18, J2-14, J1-17, J1-24, J1-29, J2-
28, J2-23, J1-3, J1-7, J2-8, J2-4
J2-17, J1-14, J1-18, J1-26, J1-30, J2-
27, J2-22, J1-4, J1-8, J2-7, J2-3
Table 3.8 - Data and Control Bus Signal Mode Options – Synchronous FIFO mode
3.7.1 Timing Diagram – Synchronous FIFO Mode Read and Write Cycle
When in Synchronous FIFO interface mode, the timing of a read and write operation on the FIFO interface
are shown in Figure 3.4 and Table 3.9
Figure 3.4 - Synchronous FIFO Mode Read and Write Cycle
Available Pins
Copyright © 2010 Future Technology Devices International Limited
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fifo_clkout
V2DIP2-64 VNCL2-64Q Development Module Datasheet Version 1.01
fifo_oe#
Name
Output
Output
Type
Document Reference No.: FT_000166
FIFO Output Enable
FIFO Output Enable
Description
Clearance No.: FTDI# 155
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