CDB5463U Cirrus Logic Inc, CDB5463U Datasheet - Page 6
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CDB5463U
Manufacturer Part Number
CDB5463U
Description
BOARD EVAL & SOFTWARE CS5463 ADC
Manufacturer
Cirrus Logic Inc
Type
A/Dr
Specifications of CDB5463U
Main Purpose
Power Management, Energy/Power Meter
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
CS5463
Primary Attributes
1-Phase, Energy-to-Frequency Output
Secondary Attributes
GUI, USB, SPI Interfaces
Product
Data Conversion Development Tools
Maximum Clock Frequency
4 MHz
Interface Type
USB
Supply Voltage (max)
5 V
Supply Voltage (min)
3.3 V
For Use With/related Products
CS5463
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
598-1553
2. PIN DESCRIPTION
6
Clock Generator
Crystal Out
Crystal In
CPU Clock Output
Control Pins and Serial Data I/O
Serial Clock Input
Serial Data Output
Chip Select
Mode Select
Energy Output
Reset
Interrupt
Serial Data Input
Analog Inputs/Outputs
Differential Voltage Inputs
Differential Current Inputs
Voltage Reference Output
Voltage Reference Input
Power Supply Connections
Positive Digital Supply
Digital Ground
Positive Analog Supply
Analog Ground
Power Fail Monitor
Voltage Reference Output
Differential Voltage Input
Differential Voltage Input
Voltage Reference Input
Positive Digital Supply
CPU Clock Output
Serial Data Ouput
Digital Ground
Mode Select
Serial Clock
Chip Select
Crystal Out
18,21,22
15,16
1,24
9,10
1
19
20
23
11
12
14
13
2
5
6
7
8
3
4
7
VREFOUT
CPUCLK
XOUT, XIN – The output and input of an inverting amplifier. Oscillation occurs when connected to
a crystal, providing an on-chip system clock. Alternatively, an external clock can be supplied to
the XIN pin to provide the system clock for the device.
CPUCLK – Output of on-chip oscillator which can drive one standard CMOS load.
SCLK – A Schmitt-trigger input pin. Clocks data from the SDI pin into the receive buffer and out
of the transmit buffer onto the SDO pin when CS is low.
SDO – Serial port data output pin.SDO is forced into a high-impedance state when CS is high.
CS – Low, activates the serial port interface.
MODE - High, enables the “auto-boot” mode. The mode pin has an internal pull-down resistor.
E3, E1, E2 – Active-low pulses with an output frequency proportional to the selected power. Con-
figurable outputs for active, apparent, and reactive power, negative energy indication, zero cross
detection, and power failure monitoring. E1, E2, E3 outputs are configured in the Operational
Modes Register.
RESET – A Schmitt-trigger input pin. Low activates Reset, all internal registers (some of which
drive output pins) are set to their default states.
INT - Low, indicates that an enabled event has occurred.
SDI - Serial port data input pin. Data will be input at a rate determined by SCLK.
VIN+, VIN- – Differential analog input pins for the voltage channel.
IIN+, IIN- – Differential analog input pins for the current channel.
VREFOUT – The on-chip voltage reference output. The voltage reference has a nominal magni-
tude of 2.5 V and is referenced to the AGND pin on the converter.
VREFIN – The input to this pin establishes the voltage reference for the on-chip modulator.
VD+ – The positive digital supply.
DGND – Digital Ground.
VA+ – The positive analog supply.
AGND – Analog ground.
PFMON – The power fail monitor pin monitors the analog supply. If the analog supply does not
meet or falls below PFMON’s voltage threshold, a Low-supply Detect (LSD) event is set in the
status register.
VREFIN
MODE
DGND
XOUT
SCLK
VIN+
SDO
VD+
VIN-
CS
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
XIN
SDI
E2
E1
INT
RESET Reset
E3
PFMON Power Fail Monitor
IIN+
IIN-
VA+
AGND
Crystal In
Serial Data Input
Energy Output 2
Energy Output 1
Interrupt
High Frequency Energy Output
Differential Current Input
Differential Current Input
Positive Analog Supply
Analog Ground
CS5463
DS678F2