EZ80L920210ZCO Zilog, EZ80L920210ZCO Datasheet - Page 33

• Manufacturer Part Number: EZ80L920210ZCO
• Description: KIT DEV EZ80 WEB SERVER
• Manufacturer: Zilog
• Series: eZ80®r

Specifications of EZ80L920210ZCO

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: eZ80L92
• Primary Attributes: *
• Secondary Attributes: *
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3165; EZ80L920210ZCO; Q1370684

UM012906-0103
Signal
A[0:7]
A[8:15]
A[16:23]
RD
RESET
BUSACK
NMI
D[0:7]
CS[0:3]
MEMRQ
WR
INSTRD
BUSREQ
PHY
Note: *All of the signals except BUSACK and INSTRD are driven by low-
voltage CMOS technology (LVC) drivers.
I/O Functionality
The eZ80
ing general-purpose port, an LED matrix, a modem reset, and two user trig-
gers. These functions are memory-mapped with an address decoder based
on the Generic Array Logic GAL22lV10D (U15) device manufactured by
Lattice Semiconductor, and a bidirectional latch (U16). Additionally, U15 is
used to decode addresses for access to the 7x5 LED matrix.
Pin #
3–10
13–20
23–30
33
35
37
39
43–50
53–56
57
34
36
38
40
®
Table 5. CPU Bus Connector J8*
Development Platform provides additional functionality, featur-
PRELIMINARY
Function
Address Bus, Low Byte
Address Bus, High Byte
Address Bus, Upper Byte
READ Signal
Push Button Reset
CPU Bus Acknowledge Signal
Nonmaskable Interrupt
Data Bus
Chip Selects
Memory Request
WRITE Signal
Instruction Fetch
CPU Bus Request signal
Clock output of the CPU
eZ80L92 Development Kit
Operational Description
Direction
Output
Output
Output
Output
Output
Output
Input
Bidirectional
Output
Output
Output
Output
User Manual
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