CP2400AB Silicon Laboratories Inc, CP2400AB Datasheet - Page 13

• Manufacturer Part Number: CP2400AB
• Description: BOARD EVAL SPI LCD DRIVER CP2400
• Manufacturer: Silicon Laboratories Inc

Specifications of CP2400AB

• Main Purpose: LCD Development
• Embedded: No
• Utilized Ic / Part: CP2400
• Primary Attributes: I²C, SMBus Interfaces
• Secondary Attributes: Up to 128 segments
• Product: Microcontroller Accessories
• Core Processor: CP2400
• Clock Speed: 20 MHz
• Interface Type: SPI
• Timers: 2
• Operating Supply Voltage: 1.8 V to 3.6 V
• Cpu Core: CP2400
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
• Other names: 336-1857

7. C8051F930 Target Board
The CP2400/1 Development Kit includes a target board with a C8051F930 device pre-installed for evaluation and
preliminary software development. Numerous input/output (I/O) connections are provided to facilitate prototyping
using the target board. Refer to Figure 10 for the locations of the various I/O connectors. Figure 12 on page 15
shows the factory default shorting block positions.
P1
P2
P3
J1
J2, J3, J4
J5
J6
J7
J8
J9
J10, J11
J12
J13
J14
J15
J16
J17
H1
H2
SW4
SW5
P1
Expansion connector (96-pin)
Power connector (accepts input from 7 to 15 VDC unregulated power adapter)
USB connector (connects to PC for serial communication)
Enable/Disable VBAT Power LED
Port I/O headers (provide access to Port I/O pins)
Enable/Disable VDD/DC+ Power LED
Provides an easily accessible ground clip
Connects pin P0.7 (IREF0 Output) to resistor R14 and capacitor C19
Connects P0.2 and P0.3 to switches and P1.5 and P1.6 to LEDs
DEBUG connector for Debug Adapter interface
Selects the power supply source (Wall Power, AAA Battery, or Coin Cell)
Connects Port I/O to UART0 interface
Connects external VREF capacitor to the P0.0/VREF
Connects the PCB ground plane to P0.1/AGND
Connects negative potentiometer (R14) terminal to pin P1.4 or to GND
Connects the potentiometer (R14) wiper to P0.6/CNVSTR
Creates an open in the power supply path to allow supply current measurement
Analog I/O terminal block
Provides terminal block access to the input and output nodes of J17
Switches the device between One-Cell (0.9–1.8 V supply) or Two-Cell (1.8–3.6 V) mode
Turns power to the MCU on or off
H1
R15
J16
PORT2
PORT1
P1.4
J15
GND
Pin 1
J6 VDD/DC+
TOUCH SENSE SWITCH
Figure 10. C8051F930 Target Board
J4
J3
J5
P2.0
SILICON LABS
J7
www.silabs.com
TOUCH SENSE SWITCH
PORT0
F930
U1
Rev. 0.1
P2.1
`
OFF
ON
J2
J13
J14
SW5
SW1
J8
P1.6
P1.5
IMEASURE
AAA_BAT
RESET
COIN_CELL
WALL_PWR
J17
H2
SW2
USB POWER
P0.2
+1VD
+3VD
VBAT
J11
2103
J1
VBAT
U3
CP
P0.3
J12
CP2400/1-DK
P2
SW3
P3
SW4
J9
Pin 2
Pin 1
13