SD001EVK National Semiconductor, SD001EVK Datasheet - Page 4

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SD001EVK

Manufacturer Part Number
SD001EVK
Description
BOARD EVALUATION CLC001
Manufacturer
National Semiconductor
Datasheets

Specifications of SD001EVK

Design Resources
CLC001 Eval Board Schematic
Main Purpose
Interface, Digital Cable Driver
Utilized Ic / Part
CLC001
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
www.national.com
t
t
t
t
r
os
jit
pd
Symbol
, t
AC Electrical Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified (Note 3)
Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.
Note 2: Current flow into device pins is defined as positive. Current flow out of device pins is defined as negative. All voltages are stated referenced to V
Note 3: Typical values are at 25˚C and 3.3V.
Note 4: This parameter is Guaranteed by Design.
Note 5: R
Note 6: The V
power other devices.
Note 7: R
Note 8: Input Current Balance (I
Test Loads
f
L
L
= 75Ω, AC-coupled at 270 Mbps, R
= 75Ω, AC-coupled at 622 Mbps, R
Rise time, Fall time
Output overshoot
Output jitter
Propagation delay
BB
output is intended as a bias supply pin for the inputs of this device only. It is not designed as a power supply output and should not be used to
Parameter
INB
) is the difference between the Input Current (I
REF
REF
= 1.91 kΩ 1% (for V
= 1.5 kΩ 1% (for V
20%–80%, (Notes 4, 5)
(Note 7)
(Note 5)
FIGURE 1. Test Loads
SDO
SDO
= 1.0 V
= 800 mV
4
IN
Conditions
p-p
) on V
±
p-p
10%), clock pattern input.
±
IN+
10%), C
and V
L
IN−
not greater than 5pF (See Figure 1)
for the same bias condition.
Min
10132904
Typ
400
1.9
25
5
Max
800
SS
Units
= 0V.
ps
ps
ns
%

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