SD001EVK National Semiconductor, SD001EVK Datasheet - Page 8

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SD001EVK

Manufacturer Part Number
SD001EVK
Description
BOARD EVALUATION CLC001
Manufacturer
National Semiconductor
Datasheets

Specifications of SD001EVK

Design Resources
CLC001 Eval Board Schematic
Main Purpose
Interface, Digital Cable Driver
Utilized Ic / Part
CLC001
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
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Device Operation
Figure 7 shows an AC-coupled, twisted pair cable applica-
tion. It implements a center tap capacitance termination
PECL or LVPECL drivers may be interfaced to the CLC001
as shown in Figure 8. The voltage divider network will reduce
the PECL output to the proper levels. For LVPECL, the 100Ω
series resistors should be removed, since the common
(Continued)
FIGURE 7. Twisted Pair Cable, AC-coupled
FIGURE 8. PECL, DC-coupled
8
used in conjunction with two 50Ω resistors to filter common
mode noise. R
each input.
mode range inputs of the CLC001 are wide enough to accept
LVPECL levels directly. No external DC biasing is required
for PECL/LVPECL connections.
BB
set at 5kΩ provides 1.25V of DC bias to
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