DP83848T-MAU-EK National Semiconductor, DP83848T-MAU-EK Datasheet - Page 75

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DP83848T-MAU-EK

Manufacturer Part Number
DP83848T-MAU-EK
Description
BOARD EVALUATION DP83848T
Manufacturer
National Semiconductor
Datasheets

Specifications of DP83848T-MAU-EK

Main Purpose
Interface, Ethernet
Utilized Ic / Part
DP83848T
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
8.2.24 RMII Transmit Timing
T2.24.1
T2.24.2
T2.24.3
T2.24.4
Parameter
PMD Output Pair
X1 Clock Period
TXD[1:0], TX_EN, Data Setup
to X1 rising
TXD[1:0], TX_EN, Data Hold
from X1 rising
X1 Clock to PMD Output Pair
Latency
TXD[1:0]
TX_EN
Description
X1
T2.24.2
T2.24.1
50 MHz Reference Clock
From X1 Rising edge to first bit of symbol
Valid Data
75
Notes
T2.24.3
T2.24.4
Symbol
Min
4
2
Typ
20
17
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Max Units
bits
ns
ns
ns

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