DS91M040EVK/NOPB National Semiconductor, DS91M040EVK/NOPB Datasheet - Page 3

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DS91M040EVK/NOPB

Manufacturer Part Number
DS91M040EVK/NOPB
Description
BOARD EVALUATION DS91M040
Manufacturer
National Semiconductor
Series
PowerWise®r
Datasheets

Specifications of DS91M040EVK/NOPB

Main Purpose
Interface, M-LVDS, Transceiver
Utilized Ic / Part
DS91M040
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Other names
DS91M040EVK
Each device (U1 or U2) has four channels. The three M-LVDS channels of each device directly connect to the
first two rows of J4, which is an ADF (Advanced Differential Fabric) connector. When J4 is inserted into any
ATCA backplane slot (location J20/P20 for those of you familiar with ATCA backplanes), the M-LVDS I/O pins of
each device electrically connect to one of the clock busses (there are six clock busses in an ATCA backplane –
See Figure 2).
The remaining M-LVDS channel of each device connects to the SMA connectors for device standalone
evaluation or evaluation in point-to-point links.
Table 1 provides M-LVDS I/O pin to J4 pin (and stub length) or SMA connector mapping and LVCMOS pins to
J2 pin mapping.
J1 provides easy connection to U1 control pins. Refer to the DS91M040 datasheet for the device pin
descriptions.
J3 provides easy connection to U2 control pins. Refer to the DS91M040 datasheet for the device pin
descriptions.
J5 and J6 are power and ground connections.
April 14, 2008
Rev. 1.0
Device
U1
U1
U1
U1
U2
U2
U2
U2
M-LVDS Pins
A0
B0
A1
B1
A2
B2
A3
B3
A0
B0
A1
B1
A2
B2
A3
B3
J4 Pins / SMA Connector
Table 1 - U1 and U2 Pin to Connector Pin Mapping
© 2008, National Semiconductor Corp.
SMA1
SMA2
SMA3
SMA4
D1
C1
G1
H1
G2
H2
B1
A1
F1
E1
E2
F2
3
Stub Length
1.50”
1.00”
0.50”
0.50”
1.00”
1.50”
NA
NA
LVCMOS Pins
R0
D0
R1
D1
R2
D2
R3
D3
R0
D0
R1
D1
R2
D2
R3
D3
J2 Pins
11
13
15
17
19
21
23
25
27
29
31
1
3
5
7
9

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