SI3210PPQX-EVB Silicon Laboratories Inc, SI3210PPQX-EVB Datasheet - Page 15
![no-image](/images/manufacturer_photos/0/6/609/silicon_laboratories_inc_sml.jpg)
SI3210PPQX-EVB
Manufacturer Part Number
SI3210PPQX-EVB
Description
BOARD EVALUATION FOR SI3210 MLP
Manufacturer
Silicon Laboratories Inc
Series
ProSLIC®r
Datasheets
1.SI3201-KS.pdf
(138 pages)
2.SI3210PPQX-EVB.pdf
(40 pages)
3.SI3210MPPQX-EVB.pdf
(146 pages)
Specifications of SI3210PPQX-EVB
Main Purpose
Interface, Analog Front End (AFE)
Utilized Ic / Part
Si3210
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1169
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- Download datasheet (827Kb)
Table 10. Switching Characteristics (SPI)
V
Cycle Time SCLK
Rise Time, SCLK
Fall Time, SCLK
Delay Time, SCLK Fall to SDO Active
Delay Time, SCLK Fall to SDO
Transition
Delay Time, CS Rise to SDO Tri-state
Setup Time, CS to SCLK Fall
Hold Time, CS to SCLK Rise
Setup Time, SDI to SCLK Rise
Hold Time, SDI to SCLK Rise
Delay Time between Chip Selects
(Continuous SCLK)
Delay Time between Chip Selects
(Non-continuous SCLK)
SDI to SDITHRU Propagation Delay
Note: All timing is referenced to the 50% level of the waveform. Input test levels are V
DDA
= V
DDA
= 3.13 to 5.25 V, T
SCLK
Parameter
SDO
SDI
CS
A
t
= 0 to 70 °C for K-Grade, –40 to 85 °C for B-Grade, C
su1
t
d1
t
r
Figure 7. SPI Timing Diagram
Symbol
t
t
t
t
t
t
t
t
t
t
su1
su2
t
d1
d2
d3
h1
h2
d4
t
t
cs
cs
c
r
f
Rev. 1.45
t
su2
t
Conditions
t
c
thru
t
d2
Test
t
h2
0.062
Min
440
220
25
20
25
20
—
—
—
—
—
—
IH
L
= 20 pF
= V
t
Si3210/Si3211
r
t
DDD
h1
Typ
—
—
—
—
—
—
—
—
—
—
—
—
4
–0.4 V, V
t
cs
t
d3
Max
IL
25
25
20
20
20
10
—
—
—
—
—
—
—
= 0.4 V
Unit
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
15
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