FPDXSDUR-43USB/NOPB National Semiconductor, FPDXSDUR-43USB/NOPB Datasheet - Page 7

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FPDXSDUR-43USB/NOPB

Manufacturer Part Number
FPDXSDUR-43USB/NOPB
Description
KIT EVAL DS99R421 CONV TO LVDS
Manufacturer
National Semiconductor

Specifications of FPDXSDUR-43USB/NOPB

Main Purpose
Interface, Serializer, Deserializer (SERDES)
Utilized Ic / Part
DS90UR124, DS99R421
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Other names
FPDXSDUR-43USB
Note:
VDD and VSS MUST
be applied externally
from here.
JP7
S1
J1
DS99R421 Translator Board Description:
The 20-pin IDC connector J1 accepts standard 18-bit 3-channels of LVDS RGB data
(RxIN0+/-, RxIN1+/-, RxIN2+/-) and clock (RxCLK+/-).
integrated in the DS99R421 LVDS RxIN inputs so no external resistors are required.
The translator board is powered externally from the J3 (VDD) and J4 (VSS) connectors
shown below. For the serializer to be operational, the Power Down (S1-PWDNB) and
Data Enable (S1-DEN) switches on S1 must be set HIGH. The board is factory
configured. JP1 and JP2 are configured from the factory to be shorted to VSS; these
are the unused power wires in the cable harness.
The USB connector P2 (USB-A side) on the bottom side of the board provides the
interface connection to the FPD-Link II signals to the De-serializer board. Note: P1
(mini USB) on the top side is un-stuffed and not to be used with the cable provided in
the kit.
J4, J5
NOT FOR EMI TESTING
National Semiconductor Corporation
NOT FOR EMI TESTING
The 100 ohm terminations are
Date: 5/12/2008
Page 7 of 39
FPD-Link II OUTPUT
LVDS INPUTS
LVCMOS INPUTS
FUNCTION CONTROLS
POWER SUPPLY
100Ω FPD-Link II OUTPUT
Note:
Connect cable
to P2 on BACKSIDE.
(UNSTUFFED)
R5
VR1, JP6
P2 (BACKSIDE)
P1 (TOPSIDE)

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